31
(3) TIMMING DIAGRAM
AB
C
D
TD4
TD5
NEXT SEQ.
COMPLETE SEQUENCE
ENABLE
CLOCK
DATA1
DATA2
DATA3
DATA4
TD3 TD2
A : UNIT X.000
B : Tenth’s place 0.X00
C : Hundredth’s place 0.0X0
D : Thousandth’s place 0.00X
Note> TD2 : < 100 ns -- data set up delay from rising edge of clock
TD3 : 200 ns maximum -- data set up delay from Enable
TD4 : 1 microsec. minimum -- time between interrogation
TD5 : 200 ns minimum
MAXIMUM CLOCK FREQUENCY : 100 KHZ