36
4.2.4. Communication (Serial and Parallel)
C9
0.1u
8
+5V
74HC74
2 5
3
6
41
DQ
CLK
Q
PRCL
24
TO OPTION BOARD
RA
CLOCK (25 PIN D-SUB CONNECTOR Pin #11)
+5V
data 4
C42
0.1u
DATA1 (Pin#1)
U14
74HC670
15
1
2
3
14
13
5
4
12
11
10
9
7
6
D1
D2
D3
D4
WA
WB
RA
RB
GW
GR
Q1
Q2
Q3
Q4
R33
1K
C21
27pF
Motion
D1
10
data 3
D0
2 5
3
6
41
DQ
CLK
Q
PRCL
+5V
TO OPTION BOARD
1
2
3
D2
22
U1
232
16
2
6
14
13
11
12
1
3
4
5
15
10
9
7
8
VCC
V+
V-
T1OUT
R1IN
T1IN
R1OUT
C+
C-
C2+
C2-
GND
T2IN
R2OUT
T2OUT
R2IN
/ENABLE
To U14 IC74HC14 Pin #13
data 2
AR1
J3
1
2
3
4
5
6
7
8
9
74HC74
25
3
6
41
DQ
CLK
Q
PRCL
15
12
CP1
From PD-II (CPU #32 IC22 MC68705K Pin#11)
R20 R
R32
3K
D3
2
5
P
I
N
D
-
S
U
B
C
o
n
n
e
c
t
o
r
(
T
o
E
C
R
)
DATA2 (Pin #2)
1
TO OPTION BOARD
14
13
ED1
RA
RB
R36
1K
U15
74HC670
15
1
2
3
14
13
5
4
12
11
10
9
7
6
D1
D2
D3
D4
WA
WB
RA
RB
GW
GR
Q1
Q2
Q3
Q4
To U14 IC74HC14 Pin#1
U9D
12
13
11
/ENABLE
C8
0.1u
23
21
data 1
SIG (CLK01)
CON5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
TO OPTION BOARD
(Pin #31) D7
RA
From CON7 Pin#6
F
r
o
m
C
P
U
P
i
n
#
2
1
7
VDD
C7
0.1u
(Pin #38) D0
Out of Range
FROM OPTION BOARD
DATA4 (Pin#4)
D
0
D
7
:
D
a
t
a
0
D
a
t
a
7
F
r
o
m
C
P
U
P
o
r
t
4
IC11A
74HC14
12
(Pin #35) D3
<Doc> <RevCode>
ECR Interface Circuit (POWER PCB)
Custom
11Tuesday, August 12, 2003
Title
Size Document Number Rev
Date: Sheet
of
Motion
TO OPTION BOARD
/ENABLE
11
19
+5V
X0 (CLK00)
+5V
IC11C
74HC14
5 6
Overcapacity
6
TO MAX232 PIN#13
DSR
C20
27pF
IC13A
74HC32
1
2
3
/GR
RB
RA
To CON7 Pin#5
2
16
+5V
NCR OUT
DATA3 (Pin#3)
IC13B
74HC32
4
5
6
6
1
4
0
-
P
P
D
-
2
0
0
0
-
A
+5V
F
r
o
m
C
P
U
P
i
n
#
3
1
(Pin #36) D2
FROM OPTION BOARD
74HC03
CLOCK
RB
out of range
NCR OUT (Pin#12)
IC11F
74HC14
1312
17
NCR VCC
FROM OPTION BOARD
Overcapacity
9
9
10
8
3
/GR
J1
CLK 11
FROM MAX232 PIN#14
(Pin #34) D4
ENABLE (25 PIN D-SUB CONNECTOR Pin #19)
enable
GR
F
r
o
m
C
P
U
P
i
n
#
3
0
5
TO OPTION BOARD
From PD-II (CPU #33 )
20
18
A1
4
5
6
IC11E
74HC14
1110
GR
/ENABLE
25
+5V
R22 R
CLK 10
(Pin #32) D6
(Pin #33) D5
4
(Pin #37) D1
DTR
+5V
C10
0.1u