Programmable AC Source 6460/6463/6490 User’s Manual
This command can only be used under the control of RS-232C. If SYST : LOC is
programmed, the AC source will be set in the LOCAL state, and the front panel will
work.
SYSTem : REMote
This command can only be used under the control of RS-232C. If SYST : REM is
programmed, the AC source will be set in the REMOTE state, and the front panel will be
disabled except the Local key.
SYSTem : RWLock
This command can only be used under the control of RS-232C. If SYST : RWL is
programmed, the AC source will be set in the Remote-Lockout state, and front panel
will be disabled without exception.
STATus:OPERation?
This query returns the content of the Operation Event register. The Operation Event
register is cleared when read or by the common command *CLS.
STATus:OPERation:CONDition?
Return the content of Operation Condition register. The Condition register reflects the
TRUE or FALSE state of Operation status.
STATus:OPERation:ENABle
This command sets the enable mask, which allows true conditions in the Operation
Event register to be reported in the Operation summary bit (OPER) of the Status Byte
register.
Parameters: 0 to 32727
Condition
Bit configuration of Questionable status register
STATus:QUEStionable:EVENt?
This query returns the content of the Questionable Event register. The Event register
latches events that are passed by Questionable PTR and/or NTR filter. It is cleared when
read or by the common command *CLS.
STATus:QUEStionable:CONDition?
Return the content of the Questionable Condition register. The Condition register
reflects the TRUE or FALSE state of Questionable status.
STATus:QUEStionable:ENABle
This command sets the enable mask which allows true conditions in the Questionable
Event register to be reported in the Questionable summary (QUES) bit of the Status Byte
register.
STATus:QUEStionable:NTRansition
STATus:QUEStionable:PTRansition
These commands set the content of the Questionable NTR (negative transition 1-to-0)
and PTR (positive transition 0-to-1) registers. These registers determine what type of
transition in the Condition register shall set the corresponding bit in the Event register.