COBHAM GRMON3 - LEON2 Target Initialization; Configuration File Target Initialization; Memory Register Reset Values

GRMON3-UM
June 2019, Version 3.1.0
9 www.cobham.com/gaisler
grgpio0 Cobham Gaisler General Purpose I/O port
APB: 80000800 - 80000900
2.2.1. LEON2 target initialization
The plug and play information was introduced in the LEON3 processor (GRLIB), and is not available for LEON2
systems. LEON2 is supported by starting GRMON with the -sys leon2 switch or one of the switches that
correspond to a known LEON2 device, see Section 6.12, “LEON2 support”.
A LEON2 system has a fixed set of IP cores and address mapping. GRMON will use an internal plug and play table
that describes this configuration. The plug and play table used for LEON2 is fixed, and no automatic detection of
present cores is attempted. Only those cores that need to be initialized by GRMON are included in the table, so
the listing might not correspond to the actual target. It is however possible to load a custom configuration file that
describes the target system configuration using see Section 2.2.2, “Configuration file target initialization”
2.2.2. Configuration file target initialization
It is possible to provide GRMON with a configuration file that describes a static configuration by starting GRMON
with the switch -cfg filename.
The format of the plug and play configuration file is described in section Appendix D, Fixed target configuration
file format. It can be used for both LEON3 and LEON2 systems. An example configuration file is also supplied
with the GRMON professional distribution in share/src/cfg/leon3.xml.
2.3. Memory register reset values
To ensure that the memory registers has sane values, GRMON will reset the registers when commands that access
the memories are issued, for example run, load commands and similar commands. To modify the reset values,
use the commands listed in Section 6.14.2, “Commands”.