MA-2402 Service Manual
4-4 Circuit Theory
130445-1 Rev. A
©2000 Crown International, Inc.
for example, the power supply produced a total of 70V
from rail to rail (±35VDC measured from ground with no
signal), the amplifier output would reach a positive peak
of +70V.
Conversely, during a negative swing of the HS output
where HS PNP devices conduct, the op-amp would
output a positive voltage forcing LS NPN devices to
conduct. This would result in +Vcc swinging toward
ground potential and – Vcc further from ground poten-
tial. At the negative amplifier output peak, +Vcc = 0V
and – Vcc equals the total power supply potential with a
negative polarity. Using the same example as above, a
70V supply would allow a negative output peak of
– 70V. In summary, a power supply which produces a
total of 70VDC rail to rail (or ±35VDC statically) is ca-
pable of producing 140V peak-to-peak at the amplifier
output when the grounded bridge topology is used. The
voltage used in this example are relatively close to the
voltages of the MA-602.
The total effect is to deliver a peak to peak voltage to
the speaker load which is twice the voltage produced
by the power supply. Benefits include full utilization of
the power supply (it conducts current during both halves
of the output signal; conventional designs require two
power supplies per channel, one positive and one nega-
tive), and never exposing any output device to more
than half of the peak to peak output voltage (which does
occur in conventional designs).
Low side bias is established by a diode string which
also shunts built up charges on the output devices. Bias
is adjustable via potentiometer. Flyback diodes perform
the same function as the HS flybacks. The output of the
LS is tied directly to chassis ground via ground strap.
4.6 Output Device Emulation Protection
(ODEP)
To further protect the output stages, a specially devel-
oped ODEP circuit is used. It produces a complex ana-
log output signal. This signal is proportional to the al-
ways changing safe-operating-area margin of the out-
put transistors. The ODEP signal controls the Voltage
Translator stage by removing drive that may exceed
the safe-operating-area of the output stage.
ODEP senses output current by measuring the voltage
dropped across LS emitter resistors. LS NPN current
(negative amplifier output) and +Vcc are sensed, then
multiplied to obtain a signal proportional to output power.
Positive and negative ODEP voltages are adjustable
via two potentiometers. Across ±ODEP are a PTC and
a thermal sense (current source). The PTC is essen-
tially a cutoff switch that causes hard ODEP limiting if
heatsink temperature exceeds a safe maximum, regard-
less of signal level. The thermal sense causes the dif-
ferential between +ODEP and – ODEP to decrease as
heatsink temperature increases. An increase in posi-
tive output signal output into a load will result in – ODEP
voltage dropping; an increase in negative output volt-
age and current will cause +ODEP voltage to drop. A
complex RC network between the ±ODEP circuitry is
used to simulate the thermal barriers between the inte-
rior of the output device die (immeasurable by normal
means) and the time delay from heat generation at the
die until heat dissipates to the thermal sensor. The com-
bined effects of thermal history and instantaneous dy-
namic power level result in an accurate simulation of
the actual thermal condition of the output transistors.
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