PowerEdge T610 Technical Guide 31
7.7 Sparing
Systems with the Intel Xeon processor 5600 series support memory sparing. Sparing requires identical
memory installed in all three channels. One of the three channels is considered the Spare Channel,
and two-thirds of the total installed memory is usable and is the amount reported during POST and in
BIOS setup.
7.8 Memory Scrubbing
The T610 memory interface supports memory demand and patrol scrubbing, single-bit correction and
multi-bit error detection. Correction of a x4 or x8 device failure is also possible with (SDDC) in the
Advanced ECC mode. Additionally, correction of a x4 device failure is possible in the Memory
Optimized mode.
7.9 Advanced ECC (Lockstep) Mode
In this configuration, the two channels closest to the processor are combined to form one
128-bit channel. This mode supports SDDC for both x4- and x8-based memory modules.
Memory modules must be identical in size, speed and technology in corresponding slots.
7.10 Optimizer (Independent Channel) Mode
In Optimizer (Independent Channel) mode, all three channels are populated with identical memory
modules. This mode permits a larger total memory capacity but does not support SDDC with x8-based
memory modules.
A minimal single-channel configuration of 1 GB memory modules per processor is also supported in
this mode.
7.11 Supported Configurations
See the System Memory section in the Installing System Components chapter in the Dell PowerEdge
T610 Systems Hardware Owner's Manual on Support.dell.com.
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