Denon AVR-X4000

LAN8720A Pin Function
LAN8720A Block Diagram
Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720A/LAN8720Ai 15 Revision 1.3 (04-20-11)
DATASHEET
2.1 Pin Assignments
Table 2.8 24-QFN Package Pin Assignments
PIN NUM PIN NAME PIN NUM PIN NAME
1 VDD2A 13 MDC
2 LED2/nINTSEL
14 nINT/REFCLKO
3 LED1/REGOFF
15 nRST
4 XTAL2 16 TXEN
5 XTAL1/CLKIN 17 TXD0
6 VDDCR 18 TXD1
7 RXD1/MODE1
19 VDD1A
8 RXD0/MODE0
20 TXN
9 VDDIO 21 TXP
10 RXER/PHYAD0
22 RXN
11 CRS_DV/MODE2
23 RXP
12 MDIO 24 RBIAS
Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
Revision 1.3 (04-20-11) 8 SMSC LAN8720A/LAN8720Ai
DATASHEET
Figure 1.1 System Block Diagram
Figure 1.2 Architectural Overview
LAN8720A/
LAN8720Ai
10/100
Ethernet
MAC
RMII
Mode LED
Transformer
Crystal or
Clock
Oscillator
MDI
RJ45
RMII Logic
Interrupt
Generator
LEDs
PLL
Receiver
DSP System:
Clock
Data Recovery
Equalizer
Squeltch
& Filters
Analog-to-
Digital
10M RX
Logic
100M RX
Logic
100M PLL
10M PLL
Transmitter
10M
Transmitter
100M
Transmitter
10M TX
Logic
100M TX
Logic
Central Bias
PHY Address
Latches
LAN8720A/LAN8720Ai
RBIAS
LED1
nINT
XTAL2
XTAL1/CLKIN
LED2
Management
Control
Mode Control
Reset Control
MDIX
Control
HP Auto-MDIX
RXP/RXN
TXP/TXN
TXD[0:1]
TXEN
RXD[0:1]
RXER
CRS_DV
MDC
MDIO
Auto-
Negotiation
RMIISEL
nRST
MODE[0:2]
SMI
PHYAD0
188