Denon AVR-X500 Service Manual

105
AD8195 (F-HDMI : IC51)
AD8195 Terminal Functions
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN 39 SDA_IN
38 CEC_IN 37 AVEE 36 VREF_IN
35 SCL_OUT 34 SDA_OUT
31 CEC_OUT
11ON0 12OP0
13VTTO 14ON1
15OP1
16AVCC
17ON2
20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3
18OP2
32 AMUXVCC 33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed
Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37,
Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195
TOP VIEW
(Not to Scale)
1IN0
2IP0
3IN1
4IP1
5VTTI
6IN2
7IP2
10AVCC
30 AVCC
29 PE_EN
28 TX_EN
27 AVEE
26 AVCC
25 AVCC
24 AVEE
21 COMP
40 SCL_IN 39 SDA_IN 38 CEC_IN 37 AVEE 36 VREF_IN 35 SCL_OUT 34 SDA_OUT 31 CEC_OUT
11ON0 12OP0 13VTTO 14ON1 15OP1 16AVCC 17ON2 20OP3
9IP3
8IN3
22 AVCC
23 AVCC
19ON3 18OP2
32 AMUXVCC 33 VREF_OUT
PIN 1
INDICATOR
Mnemonic
IN0
IP0
IN1
IP1
VTTI
IN2
IP2
IN3
IP3
AVCC
ON0
OP0
VTTO
ON1
OP1
ON2
OP2
ON3
OP3
COMP
AVEE
TX_EN
PE_EN
CEC_OUT
AMUXVCC
VREF_OUT
SDA_OUT
SCL_OUT
VREF_IN
CEC_IN
SDA_IN
SCL_IN
Type
1
HS I
HS I
HS I
HS I
Power
HS I
HS I
HS I
HS I
Power
HS O
HS O
Power
HS O
HS O
HS O
HS O
HS O
HS O
Control
Power
Control
Control
LS I/O
Power
Reference
LS I/O
LS I/O
Reference
LS I/O
LS I/O
LS I/O
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AV
CC.
High Speed
Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 µF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
DDC Output Side Pull-Up Reference Voltage.
DDC Output Side Data Line Input/Output.
DDC Output Side Clock Line Input/Output.
DDC Input Side Pull-Up Reference Voltage.
CEC Input Side.
DDC Input Side Data Line.
DDC Input Side Clock Line
Pin No.
1
2
3
4
5
6
7
8
9
10, 16, 22, 23, 25, 26, 30
11
12
13
14
15
17
18
19
20
21
24,
27, 37,
Exposed Pad
28
29
31
32
33
34
35
36
38
39
40
1
HS = high speed, LS = low speed, I = input, and O = output.

Denon AVR-X500 Specifications

General

Receiver type	-
Frequency range	10 - 100000 Hz
Pre-out channels	1 SW
Speaker selector	No
Input sensitivity	200 mV
Pre-out connectivity	Yes
Audio output channels	5.1 channels
Signal-to-Noise Ratio (SNR)	98 dB
Total Harmonic Distortion (THD)	0.08 %
Power output per channel (1KHz@6 Ohm)	140 W
Power output per channel (20-20KHz@8 Ohm)	75 W
HDMI in	4
Audio (L/R) in	3
Composite video in	2
Ethernet LAN (RJ-45) ports	0
Number of HDMI outputs	1
Connectivity technology	Wired
Speakers connectivity type	Clamp terminals
Multichannel pre out connectivity	RCA
FM band range	87.5 - 108 MHz
Supported radio bands	AM, FM
Product color	Black
Audio decoders	Dolby Digital EX, Dolby Pro Logic IIx, Dolby TrueHD, DTS 96/24, DTS-ES, DTS-HD Master Audio
Apple docking compatibility	Not supported
Number of products included	1 pc(s)
AC input voltage	230 V
AC input frequency	50 Hz
Power consumption (standby)	0.3 W
Power consumption (typical)	330 W
Cables included	AC

Weight and Dimensions

Depth	319 mm
Width	434 mm
Height	151 mm
Weight	7900 g