38
DCD-710AE
59 P61/A17 (SRAMSTB) I Reserved
60 P62/A18 PWR_DET I "AC power OFF detection input
(When it is unplugged AC : L)"
61 P63/A19 DOUT_MUTE O Mute output of digital data
62 P64/A20 DOUT_SEL O Digital data output selection
63 P65/A21 92SBSY I OASIS system busy input Connection with Borelo (4) pin.
64 P66/A22 28INT0 O Reserved
65 P67/A23 BOOT_CONT I Reserved
66 P80/CS0/
TA1OUT[BOOT ]
BOOT O BOOT (for farm writing) Only the output port
67 P81/CS1/TA3OUT OPEN O Non Only the output port
68 P82/CS2 5V_REG_SW O Reserved Only the output port
69 P83/CS3/WAIT/
TA5OUT
92BUCK(DSP) O *TC94A92FG bus control Schmitt input
70 PD1/TB1IN0/INT5 92DREQ(MP3) I OASIS DREQ input (Schmitt I input) only for input
71 PD2/TB1IN1/INT6/
TXD2
28TXD O For TMP92FD28FG communication (Schmitt I input)
72 AM1
PULL UP(0
Ω
)
I AM1 Pull UP Fixed H
73 X2 Oscillator
connection pin
O Oscillator connection pin
74 DVSS Power supply
(GND)
P Power supply (GND)
75 X1 Oscillator
connection pin
I Oscillator connection pin
76 DVCC Power supply
(+3.3V)
P Power supply (+3.3V)
77 RESET RESET I
Reset input of
μ
-com
78 AM0
PULL UP(0
Ω
)
I AM0 Pull UP Fixed H
79 P77/XT2
PULL UP(47k
Ω
)
O Non Open drain output
80 P76/XT1 92CCE(DSP) O *TC94A92FG bus control Open drain output R644(OPEN);GND
81 DVCC Power supply
(+3.3V)
P Power supply (+3.3V)
82 P70/RD
CHECKIN(100K
Ω
/
PD)
I P.W.B. check mode Schmitt input and with PU resistance
83 P71/SRWR
CHECK1(100K
Ω
/
PD)
I P.W.B. check mode Schmitt input and with PU resistance
84 P72/SRLLB
CHECK2(100K
Ω
/
PD)
I P.W.B. check mode Schmitt input and with PU resistance
85 P73/SRLUB
CHECK3(100K
Ω
/
PD)
I P.W.B. check mode Schmitt input
86 PD3/TB1OUT0/RXD2/
INT7
28RXD I For TMP92FD28FG communication (Schmitt I input)
87 PD4/TB1OUT1/SCLK2/
CTS2
OPEN O Non (Schmitt I input)
88 DVSS Power
supply(GND)
P Power supply(GND)
89 PL3/AN11/ADTRG
100K
Ω
PD
I Non Port only for input(Schmitt )
90 PL2/AN10
100K
Ω
/PD
I Non Port only for input(Schmitt )
91 PL1/AN9
100K
Ω
/PD
I Non Port only for input(Schmitt )
92 PL0/AN8
100K
Ω
/PD
I Non Port only for input(Schmitt )
93 PG7/AN7/KI7
100K
Ω
/PD
I Non Port only for input(Schmitt )/Key on
W.UP
94 PG6/AN6/KI6
100K
Ω
/PD
I Non Port only for input(Schmitt )/Key on
W.UP
95 PG5/AN5/KI5
100K
Ω
/PD
I Non Port only for input(Schmitt )/Key on
W.UP
96 PG4/AN4/KI4
100K
Ω
/PD
I Non Port only for input(Schmitt )/Key on
W.UP
97 PG3/AN3/KI3
100K
Ω
/PD
I Non Port only for input(Schmitt )/Key on
W.UP
98 PG2/AN2/KI2 LD_CHCK I Input for LD check Port only for input(Schmitt )/Key on
W.UP
99 PG1/AN1/KI1 KEY1 I KEY input 1 Port only for input(Schmitt )/Key on
W.UP
100 PG0/AN0/KI0 KEY0 I KEY input 10 Port only for input(Schmitt )/Key on
W.UP
Pin
No
IC Terminal ame Terminal name
I/O
setting
Terminal function Remarks
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