Denon PMA-50 - Page 65

Pin I/O Port Name PD/PU I/O STBY CONTENTS
71 VSS1
- - -
72 VDD1
- - -
73 PB12
OLED_CS - O O/L OLED DATA SELECTION
74 PB13
OLED_SCLK - O O/L OLED CLOCK
75 PB14
OLED_DC - O O/L OLED DATA / COMMAND CONTROL
76 PB15
OLED_SDIN - O O/L OLED DATA
77 PD8
OLED_RES - O O/L OLED Reset
78 PD9
CTRL_OLED - O O/L OLED LIGHT 17V CONTROL
79 PD10
CTRL_1.2DSP - O O/L 1.2V power control of USB-B(TMS320C6748BZWT3)
80 PD11
CTRL_1.8DSP - O O/L 1.8V power control of USB-B(TMS320C6748BZWT3)
81 PD12
CTRL_3.3DSP - O O/L 3.3V power control of USB-B(TMS320C6748BZWT3)
82 PD13
SDA_USBB_EVOL - I/O O/L SDA port of USB-B(TMS320C6748BZWT3)
83 VSS8
GND - I/L -
84 VDD8
VDD - I/H -
85 PD14
SCL_USBB_EVOL - O O/L SCL port of USB-B(TMS320C6748BZWT3)
86 PD15
USBB_POWER_DET - I I/L Power detection from USB-B(TMS320C6748BZWT3)
87 PG2
DSD_PCM - I I/L DSD/PCM signal of USB-B(TMS320C6748BZWT3)
88 PG3
USBB_RST - O O/L RESET port of USB-B(TMS320C6748BZWT3)
89 PG4
FPGA_RST - O O/L FPGA RESET
90 PG5
FPGA_MUTE - O O/L "MUTE port of FPGA(CP4CE15F17C8N)
* H : Mute / L : Unmute"
91 PG6
VER_CONT - O O/L "Version control port of FPGA(CP4CE15F17C8N)
* H : Normal mode / L : Version mode"
92 PG7
EMPHASIS - I/O O/L Emphasis
93 PG8
FS-STS-A0 - O O/L Frequency status A0 port of FPGA(CP4CE15F17C8N)
94 VSS9
- - -
95 VDD9
- - -
96 PC6
FS-STS-A1 - O O/L Frequency status A1 port of FPGA(CP4CE15F17C8N)
97 PC7
FS-STS-B0 - I/O O/L Frequency status B0 port of FPGA(CP4CE15F17C8N)
98 PC8
FS-STS-B1 - I/O O/L Frequency status B1 port of FPGA(CP4CE15F17C8N)
99 PC9
FS-STS-B2 - I/O O/L Frequency status B2 port of FPGA(CP4CE15F17C8N)
100 PA8
AMUTE - I I/L FPGA MUTE OUTPUT
101 PA9
RS232_TX - I I/L Upgrade only
102 PA10
RS232_RX - O O/L Upgrade only
103 PA11
CTRL_FPGA1.2V - O O/L 1.2V power control of FPGA(CP4CE15F17C8N)
104 PA12
CTRL_FPGA2.5V - O O/L 2.5V power control of FPGA(CP4CE15F17C8N)
105 PA13/JTMS-SWDIO
JTMS - O O/L JTMS JTAG(Debug only)
106 N.C
- - -
107 VSS2
GND - - I/L -
108 VDD2
VDD - - I/H -
109 PA14/JTCK-SWCLK
JTCK - I I/L JTCK JTAG(Debug only)
110 PA15/JTDI
JTDI - I I/L JTDI JTAG(Debug only)
111 PC10
- O O/L -
112 PC11
- O O/L -
113 PC12
- O O/L -
114 PD0
USBB_INT - I I/L Interrupt port of USB-B(TMS320C6748BZWT3)
115 PD1
USBB_MUTE - I I/L MUTE port of USB-B(TMS320C6748BZWT3)
116 PD2
NFC_INTRP - I I/H NFC DETECT
117 PD3
MCU_TP - O O/L -
118
PD4
RMC - I I/H REMOCON INTERRUPT PORT
119
PD5
POWER_KEY - I I/H Power Key
120
VSS10
GND - - I/L -
121 VDD10 VDD - - I/H -
122 PD6 CSR_INTRT - I I/L CSR SPEAKER PROTECTION
123 PD7 DIR_RERR - I I/H DIR LOCK/UNLOCK
124 PG9 DIR_INT - I I/L DIR PCM/NONPCM
125 PG10 PDN - I I/L POWER DOWN DETECTION
126 PG11 BT_INTRP - I I/L BLUETOOTH INTERRUPT PORT
127 PG12 DC_PRT1 - I O/L DC PROTECTION 1
128 PG13 DC_PRT2
- I O/L DC PROTECTION 2
129 PG14
- O O/L -
130 VSS11 GND
- - I/L -
131 VDD11 VDD
- - I/H -
132 PG15
- O O/L -
133 PB3/JTDO JTDO
- O O/L JTDO JTAG(Debug only)
134 PB4/NJTRST NJTRST
- O O/L NJTRST JTAG(Debug only)
135 PB5
- O O/L -
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