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Chapter 5 Digital I/O Progr amming Guide
Chapter 5
Chapter 5 - Digital I/O Programming Guide
Register Description
The Input P ort Register (register 0) reflects the incoming logic lev els of the pins, regard-
less of whether the pin if defined as an input or output by the Configur ation Register. They
act only on the red oper ation. Writes to this register ha ve no ef fect. The default value (X) is
determined by the externally applied logic lev el. Before a red oper ation, a write tr ansmission
is sent with the command byte to indicate to the I
2
C device that the Input P ort Regiser will be
accessed next.
BIT I-7 I-6 I-5 I-4 I-3 I-2 I-1 I-0
DEFAULT
XXXX X XXX
The Onput P ort Register (register 1) shows the outgoing logic lev els of the pins defined as
outputs by the Configur ation Register. Bit v alues in this register ha ve no effect on pins defined
as inputs. In turns, reads from this register reflect the v alue that is in the flip-flop contolling
the output selection, not the actual pin v alue.
BIT O-7 O-6 O-5 O-4 O-3 O-2 O-1 O-0
DEFAULT
1111 1 111
Register 0 (Input P ort Register)
Register 1 (Onput P ort Register)
The Polarity Inversion Register (register 2) allows polarit y inversion of the pins defined as
inputs by the Configur ation Register. If a bit in this register is set (writ ten with 1), the cor -
responding port pin’ s polarity is inverted. If a bit in this register is clear (writ ten with a 0), the
corresponding port pin’ s original polarit y is retained.
BIT N-7 N-6 N-5 N-4 N-3 N-2 N-1 N-0
DEFAULT
0000 0 000
Register 2 (Polarity Inversion Register)
The Configuration Register (register 3) configures the direction of the I/O pins. If a bit in this
register is set to 1, the corresponding port pin is enabled as an input with a high-impedence
output driver. If a bit in this register is cleared to 0, the corresponding port is enabled as an
input.
BIT C-7 C-6 C-5 C-4 C-3 C-2 C-1 C-0
DEFAULT
1111 1 111
Register 3 (Configuration Register)