Eaton EMR-4000 - Page 990

EMR-4000 IM02602009E
Name Description
Logic.LE66.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE66.Gate In1-I State of the module input: Assignment of the Input Signal
Logic.LE66.Gate In2-I State of the module input: Assignment of the Input Signal
Logic.LE66.Gate In3-I State of the module input: Assignment of the Input Signal
Logic.LE66.Gate In4-I State of the module input: Assignment of the Input Signal
Logic.LE66.Reset Latch-I State of the module input: Reset Signal for the Latching
Logic.LE67.Gate Out Signal: Output of the logic gate
Logic.LE67.Timer Out Signal: Timer Output
Logic.LE67.Out Signal: Latched Output (Q)
Logic.LE67.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE67.Gate In1-I State of the module input: Assignment of the Input Signal
Logic.LE67.Gate In2-I State of the module input: Assignment of the Input Signal
Logic.LE67.Gate In3-I State of the module input: Assignment of the Input Signal
Logic.LE67.Gate In4-I State of the module input: Assignment of the Input Signal
Logic.LE67.Reset Latch-I State of the module input: Reset Signal for the Latching
Logic.LE68.Gate Out Signal: Output of the logic gate
Logic.LE68.Timer Out Signal: Timer Output
Logic.LE68.Out Signal: Latched Output (Q)
Logic.LE68.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE68.Gate In1-I State of the module input: Assignment of the Input Signal
Logic.LE68.Gate In2-I State of the module input: Assignment of the Input Signal
Logic.LE68.Gate In3-I State of the module input: Assignment of the Input Signal
Logic.LE68.Gate In4-I State of the module input: Assignment of the Input Signal
Logic.LE68.Reset Latch-I State of the module input: Reset Signal for the Latching
Logic.LE69.Gate Out Signal: Output of the logic gate
Logic.LE69.Timer Out Signal: Timer Output
Logic.LE69.Out Signal: Latched Output (Q)
Logic.LE69.Out inverted Signal: Negated Latched Output (Q NOT)
Logic.LE69.Gate In1-I State of the module input: Assignment of the Input Signal
Logic.LE69.Gate In2-I State of the module input: Assignment of the Input Signal
Logic.LE69.Gate In3-I State of the module input: Assignment of the Input Signal
Logic.LE69.Gate In4-I State of the module input: Assignment of the Input Signal
Logic.LE69.Reset Latch-I State of the module input: Reset Signal for the Latching
Logic.LE70.Gate Out Signal: Output of the logic gate
Logic.LE70.Timer Out Signal: Timer Output
Logic.LE70.Out Signal: Latched Output (Q)
Logic.LE70.Out inverted Signal: Negated Latched Output (Q NOT)
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