Epson RX8111CE User Manual

RX8111CE
Page − 47
ETM61E-01
Figure 36 Avoiding EVIN pin input event, user read time stamp data.
(1) Time stamp by self monitor detection of RTC
1) ECMP bit (Enable VCMP)
This bit controls time stamp (VCMP) ON/OFF.
Table 66 ECMP bit (Enable VCMP)
ECMP
Data
Description
Write
0
No time stamp event even VCMP is detected.
1
Time stamp event occurs. When V
BAT
> V
DD
becomes true, under condition of
charging to re-chargeable battery.
2) EVDET bit (Enable VDET)
This bit controls time stamp (VDET) ON/OFF.
When user set EVDET to ”1”, at least 31.25m sec time interval is needed after INIEN setting to “1”. If user cannot set 31.25 ms
interval, unreliable result will be obtained, in such case please ignore the result data. Also, if user used fixed SW combination,
don’t use this register. Refer to Figure 38
Table 67 EVDET bit (Enable VDET)
EVDET
Data
Description
Write
0
No time stamp event even V
DET1
is detected.
1
When RTC moves to backup mode, time stamp event occurs.
3) EVLOW bit (Enable VLOW )
This bit controls VLOW detection ON/OFF and time stamp (VLOW) ON/OFF. A common register for VLOW function and time
stamp.
Table 68 EVLOW bit (Enable VLOW)
EVLOW
Data
Description
Write
0
No time stamp event and no VLOW detection.
1
VLOW detection and time stamp event when VLOW is detected.
4) EXST bit (Enable X’tal Oscillation Stop)
This bit control time stamp (XST) trigger ON/OFF
Table 69 EXST bit (Enable X’tal Oscillation Stop)
EXST
Data
Description
Write
0
No time stamp event even when internal crystal oscillation stops.
1
Time stamp event occurs when crystal oscillation stop is detected.

Epson RX8111CE Specifications

General

Brand	Epson
Model	RX8111CE
Category	Control Unit
Language	English