Chapter 3. Schematic Checklist
high-impedance state or enable the pull-up and pull-down during software initialization to avoid extra power
consumption.
• Avoid using the pins already occupied by ash/PSRAM.
• Some pins will have glitches during power-up. Refer to Table Power-Up Glitches on Pins for details.
• When USB-OTG Download Boot mode is enabled, some pins will have level output. Refer to Table IO Pad
Status After Chip Initialization in the USB-OTG Download Boot Mode for details.
• SPICLK_N, SPICLK_P, and GPIO33 ~ GPIO37 work in the same power domain, so if octal 1.8 V
ash/PSRAM is used, then SPICLK_P and SPICLK_N also work in the 1.8 V power domain.
• Only GPIOs in the VDD3P3_RTC power domain can be controlled in Deep-sleep mode.
Table 9: IO MUX Pin Functions
No. Name Type Power At Reset After Reset IO MUX RTC Analog
1 LNA_IN Analog
2 VDD3P3 Power
3 VDD3P3 Power
4 CHIP_PU Analog VDD3P3_RTC
5 GPIO0 IO VDD3P3_RTC IE, WPU IE, WPU IO MUX RTC
6 GPIO1 IO VDD3P3_RTC IE IE IO MUX RTC Analog
7 GPIO2 IO VDD3P3_RTC IE IE IO MUX RTC Analog
8 GPIO3 IO VDD3P3_RTC IE IE IO MUX RTC Analog
9 GPIO4 IO VDD3P3_RTC IO MUX RTC Analog
10 GPIO5 IO VDD3P3_RTC IO MUX RTC Analog
11 GPIO6 IO VDD3P3_RTC IO MUX RTC Analog
12 GPIO7 IO VDD3P3_RTC IO MUX RTC Analog
13 GPIO8 IO VDD3P3_RTC IO MUX RTC Analog
14 GPIO9 IO VDD3P3_RTC IE IO MUX RTC Analog
15 GPIO10 IO VDD3P3_RTC IE IO MUX RTC Analog
16 GPIO11 IO VDD3P3_RTC IE IO MUX RTC Analog
17 GPIO12 IO VDD3P3_RTC IE IO MUX RTC Analog
18 GPIO13 IO VDD3P3_RTC IE IO MUX RTC Analog
19 GPIO14 IO VDD3P3_RTC IE IO MUX RTC Analog
20 VDD3P3_RTC Power
21 XTAL_32K_P IO VDD3P3_RTC IO MUX RTC Analog
22 XTAL_32K_N IO VDD3P3_RTC IO MUX RTC Analog
23 GPIO17 IO VDD3P3_RTC IE IO MUX RTC Analog
24 GPIO18 IO VDD3P3_RTC IE IO MUX RTC Analog
25 GPIO19 IO VDD3P3_RTC IO MUX RTC Analog
26 GPIO20 IO VDD3P3_RTC USB_PU USB_PU IO MUX RTC Analog
27 GPIO21 IO VDD3P3_RTC IO MUX RTC
28 SPICS1 IO VDD_SPI IE, WPU IE, WPU IO MUX
29 VDD_SPI Power
30 SPIHD IO VDD_SPI IE, WPU IE, WPU IO MUX
31 SPIWP IO VDD_SPI IE, WPU IE, WPU IO MUX
32 SPICS0 IO VDD_SPI IE, WPU IE, WPU IO MUX
33 SPICLK IO VDD_SPI IE, WPU IE, WPU IO MUX
34 SPIQ IO VDD_SPI IE, WPU IE, WPU IO MUX
35 SPID IO VDD_SPI IE, WPU IE, WPU IO MUX
36 SPICLK_N IO VDD_SPI / VDD3P3_CPU IE IE IO MUX
37 SPICLK_P IO VDD_SPI / VDD3P3_CPU IE IE IO MUX
38 GPIO33 IO VDD_SPI / VDD3P3_CPU IE IO MUX
39 GPIO34 IO VDD_SPI / VDD3P3_CPU IE IO MUX
40 GPIO35 IO VDD_SPI / VDD3P3_CPU IE IO MUX
41 GPIO36 IO VDD_SPI / VDD3P3_CPU IE IO MUX
42 GPIO37 IO VDD_SPI / VDD3P3_CPU IE IO MUX
43 GPIO38 IO VDD3P3_CPU IE IO MUX
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Espressif Systems 20
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