Chapter 3. Schematic Checklist
Table 9 – continued from previous page
No. Name Type Power At Reset After Reset IO MUX RTC Analog
44 MTCK IO VDD3P3_CPU IE IO MUX
45 MTDO IO VDD3P3_CPU IE IO MUX
46 VDD3P3_CPU Power
47 MTDI IO VDD3P3_CPU IE IO MUX
48 MTMS IO VDD3P3_CPU IE IO MUX
49 U0TXD IO VDD3P3_CPU IE, WPU IE, WPU IO MUX
50 U0RXD IO VDD3P3_CPU IE, WPU IE, WPU IO MUX
51 GPIO45 IO VDD3P3_CPU IE, WPD IE, WPD IO MUX
52 GPIO46 IO VDD3P3_CPU IE, WPD IE, WPD IO MUX
53 XTAL_N Analog
54 XTAL_P Analog
55 VDDA Power
56 VDDA Power
57 GND Power
• IE –input enabled
• WPU –internal weak pull-up resistor enabled
• WPD –internal weak pull-down resistor enabled
• USB_PU –USB pull-up resistor enabled
– By default, the USB function is enabled for USB pins (i.e., GPIO19 and GPIO20), and
the pin pull-up is decided by the USB pull-up resistor. The USB pull-up resistor is
controlled by USB_SERIAL_JTAG_DP/DM_PULLUP and the pull-up value is controlled by
USB_SERIAL_JTAG_PULLUP_VALUE. For details, see ESP32-S3 Technical Reference Manual >
Chapter USB Serial/JTAG Controller.
– When the USB function is disabled, USB pins are used as regular GPIOs and the pin’s internal weak
pull-up and pull-down resistors are disabled by default (congurable by IO_MUX_FUN_WPU/WPD)
Table 10: Power-Up Glitches on Pins
Pin Glitch
3
Typical Time (µs)
GPIO1 Low-level glitch 60
GPIO2 Low-level glitch 60
GPIO3 Low-level glitch 60
GPIO4 Low-level glitch 60
GPIO5 Low-level glitch 60
GPIO6 Low-level glitch 60
GPIO7 Low-level glitch 60
GPIO8 Low-level glitch 60
GPIO9 Low-level glitch 60
GPIO10 Low-level glitch 60
GPIO11 Low-level glitch 60
GPIO12 Low-level glitch 60
GPIO13 Low-level glitch 60
GPIO14 Low-level glitch 60
XTAL_32K_P Low-level glitch 60
XTAL_32K_N Low-level glitch 60
GPIO17 Low-level glitch 60
GPIO18 Low-level/High-level glitch 60
GPIO19 Low-level glitch/High-level glitch
4
60
GPIO20 Pull-down glitch/High-level glitch
Page 22, 4
60
3
• Low-level glitch: the pin is at a low level output status during the time period;
• High-level glitch: the pin is at a high level output status during the time period;
• Pull-down glitch: the pin is at an internal weak pulled-down status during the time period;
• Pull-up glitch: the pin is at an internal weak pulled-up status during the time period.
Espressif Systems 21
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