EVS XTnano - Page 41

Specifications
• each pin can be individually configured as an output or an input
• internal 4K7 pull up to +5V
• low level Vi<1.5 Volt (U12=74HC245)
• high level Vi>3.5 Volt (U12=74HC245)
• optional TTL compatible level (U12=74HCT245)
XTnano Server- Version 11.01- Hardware Technical Reference Manual
5. Hardware Installation and Cabling 33