Preliminary
15(45)
Prepared Document Number
Manfred Ortmann
Approved Checked Date Revision Storage
2009-10-05 PA 4.2 Mycable01
Pin Signal Function
106 DOUTR1_R_5 Digital RGB output1 with serial resistor
107 DOUTG1_R_6 Digital RGB output1 with serial resistor
108 DOUTR1_R_2 Digital RGB output1 with serial resistor
109 DOUTR1_R_3 Digital RGB output1 with serial resistor
110 DCLKO1_R Video output interface 1 dot clock output w. s. r.
111 DOUTR1_R_4 Digital RGB output1 with serial resistor
112 GV1 Video output interface 1 graphics / video switch
113 DOUTR1_R_7 Digital RGB output1 with serial resistor
114 VINHSYNC0 Video Capture 0 Horizontal Syncronisation
115 DOUTR1_R_6 Digital RGB output1 with serial resistor
116 VINVSYNC1 Video Capture 1 Vertical Syncronisation
117
VSYNC1 Video output interface 1 vertical sync output
vertical sync input in external sync mode
118 VINFID0 Video input 0 field identification signal
119
HSYNC1 Video output interface 1 horizontal sync output
Horizontal sync input in external sync mode
120 DE1 DE / CSYNC
121 GND Ground at center pin
122 GND Ground at center pin
123 GND Ground at center pin
124 GND Ground at center pin
125 GND Ground at center pin
126 GND Ground at center pin
127 GND Ground at center pin
128 GND Ground at center pin
Tab. 2-1: Pin assignment of connector X101, CPU signals side
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