Gigabyte MZ73-LM1 - Page 97

BIOS Setup
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Parameter
Description
Target Static Lane Select
Upper 32 bits
ThisitemiscongurablewhenTarget Static Lane Control is set to
Enabled.
Target Static Lane Select
Lower 32 bits
ThisitemiscongurablewhenTarget Static Lane Control is set to
Enabled.
Target Static Lane Select
ECC
ThisitemiscongurablewhenTarget Static Lane Control is set to
Enabled.
Target Static Lane Value
ThisitemiscongurablewhenTarget Static Lane Control is set to
Enabled.
Worst Case Margin
Granularity
ConguresWorstCaseMarginGranularity.
Options available: Per Chip Select, Per Nibble.
Default setting is Per Chip Select.
Read Voltage Sweep Step
Size
ConguresthestepsizeforreadDataEyevoltagesweep.
Options available: 1, 2, 4. Default setting is 1.
Read Timing Sweep Step
Size
ConguresthestepsizeforreadDataEyetimingsweep.
Options available: 1, 2, 4. Default setting is 1.
Write Voltage Sweep Step
Size
ConguresthestepsizeforwriteDataEyevoltagesweep.
Options available: 1, 2, 4. Default setting is 1.
Write Timing Sweep Step
Size
ConguresthestepsizeforwriteDataEyetimingsweep.
Options available: 1, 2, 4. Default setting is 1.
Silent Execution
Execute MBIST Data Eye silently without ABL log output.
Options available: Enabled, Disabled. Default setting is Disabled.