Great Scott Gadgets HackRF - Jiggling SGPIO Pins from GPIO Mode; Controlling SGPIO Pins from SGPIO Mode

HackRF
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Searching I2C address space. Found devices at:
0xC0(0x60 W) 0xC1(0x60 R)
I2C A0 address configuration pin (not available on QFN20 package) is apparently forced to “0”.
24.1.3 Reading registers
# Read register 0
I2C>[0xc0 0[0xc1 r]]
...
# Register 0: SYS_INIT=0, LOL_B=0, LOL_A=0, LOS=1, REVID=0
READ: 0x10
...
# Read 16 registers, starting with register 0
I2C>[0xc0 0[0xc1 r:16]]
...
READ: 0x10 ACK 0xF8 ACK 0x03 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x8F ACK 0x01 ACK
0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x90 ACK 0x00
...
# Read 16 registers, starting with register 16
I2C>[0xc0 16[0xc1 r:16]]
...
READ: 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK
0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00 ACK 0x00
...
24.1.4 Writing registers
Simple XTAL passthrough to CLK0
# Disable all CLKx outputs.
[0xC0 3 0xFF]
# Turn off OEB pin control for all CLKx
[0xC0 9 0xFF]
# Power down all CLKx
[0xC0 16 0x80 0x80 0x80 0x80 0x80 0x80 0x80 0x80]
# Register 183: Crystal Internal Load Capacitance
# Reads as 0xE4 on power-up
# Set to 10pF (until I find out what loading the crystal/PCB likes best)
[0xC0 183 0xE4]
# Register 187: Fanout Enable
# Turn on XO fanout only.
[0xC0 187 0x40]
# Register 15: PLL Input Source
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90 Chapter 24. Lemondrop Bring Up