Heathkit SW-7800 - Page 36

Page
124
Heathkit
(to
remove
any
unwanted
mixing
products).
The fil-
tered
signal
is
then
applied
to
U214
pin
1.
Transistor
Q222
buffers
the
VCO
signal
(referred
to
as
LO
#1)
before
capacitor
C267
couples
it
to
mixer
IC
U214.
C239
also
couples
the
VCO
signal
to
dis-
play
mixer
Q215.
U214
mixes
the
VCO
frequency
with the
signal
at
the
output
of
Q221
to
produce
a
difference
fi
y
between
7
and
36
MHz.
This
difference
signal
passes
through
a
low-pass
filter,
formed
by
C272, C273,
C274,
C275,
L209, L211,
and
L212,
before
it
is
applied
to
the
amplifiers
described
next.
Transistors
Q211, Q209, Q208,
and
Q207
amplify
the
7—36
MHz
signal
to
TTL
levels
before
it
is
ap-
plied
to U207,
which
divides
it
by
10.
The resultant
7
to
3.6
MHz
signal
is
then
coupled
to
amplifier
transistor
Q206,
where
it
is
translated
to
a
15-volt
logic
level
that
is
required
by
U204
(at
pin
6).
U204
is
a
binary,
4bit,
divide-by-N
programmable
counter.
U203
contains
an
independent,
binary,
4-bit
divi¢
by-N
counter,
a
programmable
divide-by-4,
16, 64,
or
100
counter,
and
a
phase
comparator.
The
divide-
by-N
counter
is
used with
U204
to
form
a
binary
8-bit,
divide-by-N counter
that
is
programmed
by
the
controller
logic.
Depending
upon
which
band
is
selected,
the
logic
will
program
the divider
for
divi-
sion
by
a
number
between
7
and
36.
When
the
VCO
is
on
frequency,
the
results
of
this
division
is
always
100
kHz,
This
signal
is
then
applied
to
one
input
of
the
phase
comparator.
‘Transistor
Q204
amplifies
the
10
MHz
time-base
sig-
nal
coming
from
Q203
before
it
is
applied
to
the
input
of
the
other
divide-by counter
in
U203.
Since
pins
10
and
11
are
connected
to
the
15-volt
line,
this
counter
is
programmed
to
divide
by
100.
This
provides
a
stable reference
frequency
of
100
kHz
for
use
by
the
phase
comparator.
This reference
fre-
quency
is
internally
connected
to
the second
com-
parator input
The
phase
comparator
checks the
leading edge
of
each
signal
to
determine
the
phase
relationship.
If
the
signal
at
U203
pin
14
is
leading
the reference
frequency,
which indicates
a
decrease
in
the
VCO
frequency,
the detector
output
at
pin
13
will become
more
positive.
Loop
filter
Q205
amplifies
and
filters
this
error
voltage
before
it
is
applied
to
the
VCO
in an
attempt
to
bring
it
back
on
frequency.
An
error
voltage
in
the
opposite
direction
develops
when
the
frequency
of
the
VCO
increases.
When
the
phases
of
both
signals
match,
pin
12
has
narrow
pulses
riding
on
a
logic
high.
This
keeps
Q202
turned
on
so
its
collector
voltage
remains
at
0.
When
the
two
frequencies
do
not
match,
pin
12
drops
to
approximately
one-half
of
Voc,
with
an
in-
crease
in the
width
of
the
pulses
to nearly
a
50%
duty
cycle.
This
pulse
width
causes
Q207
to tum
off
long
enough
to
charge
C211.
Diode
D203
prevents
C211
from
discharging
through
Q202.
The
resulting
voltage
is
applied
to
the
base
of
switching
transistor
Q201,
which
turns
it
on
and
causes
out-of-lock
LED
D201
to
light.
U205
is
a
5-volt
regulator
for
Q207,
U207,
and
LED
D201.
U206
supplies
5
volts
to
all
other
5-volt
cir
cuits
on
the
synthe
circuit
board.
CONTROLLER
CIRCUIT
Bandswitch
Integrated
circuits
U301,
U302,
and
U303
form
the
bandswitch
decoder
circuit.
U303
is
a
dual
1-of-4
decoder
which
provides
a
switching
voltage
for
bandpass
filter
select
transistors
Q307
through
Q309
and
Q311
through
Q315.
U301
and
U302
are
4-bit
binary
adders
that
provide
the
proper
logic
for
the
programmable
dividers
on
the
synthesizer
circuit
board.
These
ICs
also
provide
logic
for
band-select
transistors
Q303
through
Q306.
Q303
and
Q306,
in
turn,
switch
the
VCO
to
the
proper
tuning
range.
NOTE:
Refer
to
the
Schematic
and
the
logic
chart
as
you
read
the
following
descriptions.
‘The
bandswitch
in
this
Receiver
provides
a
5-bit
positive
binary
logic
that
corresponds
to
bands
0
through
29.
The
logic
code
ranges
from 00000
to
11101,
with
the
least
significant
bit,on
line
0
(circuit
board
location
P).
Switch
logic
lines
1
and
0
provide
inputs
A
(pin
14)
and
B
(pin
13),
respectively,
for
decoder
U303B.
‘The
decoder
selects
the
appropriate
output
line
for
bands
1
(pin
12,
0—1
MHz),
2
(pin
10,
1—2 MHz),
or
3
(pins
9
and
11,
2—4
MHz).
Pins
9
and
11
repre-
sent
logic
points
L
and
K,
respectively.
These
pins
form
a
logical
OR
circuit
to
select
filter
3.
Diodes
1D301
and
D302
form
another
wired
OR
gate
that
dis-