Rev. 2.50 116 June 22, 2017 Rev. 2.50 117 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Bit3 TnOC:TPn_0,TPn_1Outputcontrolbit
CompareMatchOutputMode
0:Initiallow
1:Initialhigh
PWMMode
0:Activelow
1:Activehigh
ThisistheoutputcontrolbitfortheTMoutputpin.Itsoperationdependsupon
whetherTMisbeingusedintheCompareMatchOutputModeorinthePWMMode.
IthasnoeffectiftheTMisintheTimer/CounterMode.IntheCompareMatchOutput
ModeitdeterminesthelogicleveloftheTMoutputpinbeforeacomparematch
occurs.InthePWMModeitdeterminesifthePWMsignalisactivehighoractive
low.
Bit2 TnPOL:TPn_0,TPn_1OutputpolarityControl
0:Non-invert
1:Invert
ThisbitcontrolsthepolarityoftheTPn_0orTPn_1outputpin.Whenthebitisset
hightheTMoutputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasno
effectiftheTMisintheTimer/CounterMode.
Bit1 TnDPX:TMnPWMperiod/dutyControl
0:CCRP-period;CCRA-duty
1:CCRP-duty;CCRA-period
Thisbit,determineswhichoftheCCRAandCCRPregistersareusedforperiodand
dutycontrolofthePWMwaveform.
Bit0 TnCCLR:SelectTMnCounterclearcondition
0:TMnComparatrorPmatch
1:TMnComparatrorAmatch
Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe
CompactTMcontainstwocomparators,ComparatorAandComparatorP,eitherof
whichcanbeselectedtocleartheinternalcounter.WiththeTnCCLRbitsethigh,
thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA.
Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom
theComparatorPorwithacounteroverow.Acounteroverowclearingmethodcan
onlybeimplementediftheCCRPbitsareallclearedtozero.TheTnCCLRbitisnot
usedinthePWMMode.