Rev. 2.50 184 June 22, 2017 Rev. 2.50 185 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Serial Interface Module – SIM
ThesedevicescontainaSerialInterfaceModule,whichincludesboththefourlineSPIinterfaceor
thetwolineI
2
Cinterfacetypes,toallowaneasymethodofcommunicationwithexternalperipheral
hardware.Havingrelativelysimplecommunicationprotocols,theseserialinterfacetypesallowthe
microcontrollertointerfacetoexternalSPIorI
2
Cbasedhardwaresuchassensors,FlashorEEPROM
memory,etc.TheSIMinterfacepinsarepin-sharedwithotherI/OpinsthereforetheSIMinterface
functionmustrstbeselectedusingacongurationoption.Asbothinterfacetypessharethesame
pinsandregisters,thechoiceofwhethertheSPIorI
2
CtypeisusedismadeusingtheSIMoperating
modecontrolbits,namedSIM2~SIM0,intheSIMC0register.Thesepull-highresistorsoftheSIM
pin-sharedI/Oareselectedusingpull-highcontrolregisters,andalsoiftheSIMfunctionisenabled.
SPI Interface
TheSPIinterfaceisoftenusedtocommunicatewithexternalperipheraldevicessuchassensors,
FlashorEEPROMmemorydevicesetc.OriginallydevelopedbyMotorola,thefourlineSPI
interfaceisasynchronousserialdatainterfacethathasarelativelysimplecommunicationprotocol
simplifyingtheprogrammingrequirementswhencommunicatingwithexternalhardwaredevices.
Thecommunicationisfullduplexandoperatesasaslave/mastertype,wherethedevicecanbe
eithermasterorslave.AlthoughtheSPIinterfacespecicationcancontrolmultipleslavedevices
fromasinglemaster,butthisdeviceprovidedonlyoneSCSpin.Ifthemasterneedstocontrol
multipleslavedevicesfromasinglemaster,themastercanuseI/Opintoselecttheslavedevices.
SPI Interface Operation
TheSPIinterfaceisafullduplexsynchronousserialdatalink.Itisafourlineinterfacewithpin
namesSDI,SDO,SCKandSCS.PinsSDIandSDOaretheSerialDataInputandSerialDataOutput
lines,SCKistheSerialClocklineandSCSistheSlaveSelectline.AstheSPIinterfacepinsarepin-
sharedwithnormalI/OpinsandwiththeI
2
Cfunctionpins,theSPIinterfacemustrstbeenabledby
selectingtheSIMenablecongurationoptionandsettingthecorrectbitsintheSIMC0andSIMC2
registers.AftertheSPIcongurationoptionhasbeencongureditcanalsobeadditionallydisabled
orenabledusingtheSIMENbitintheSIMC0register.Communicationbetweendevicesconnected
totheSPIinterfaceiscarriedoutinaslave/mastermodewithalldatatransferinitiationsbeing
implementedbythemaster.TheMasteralsocontrolstheclocksignal.Asthedeviceonlycontains
asingleSCSpinonlyoneslavedevicecanbeutilized.TheSCSpiniscontrolledbysoftware,set
CSENbitto1toenableSCSpinfunction,setCSENbitto0theSCSpinwillbeoatingstate.
TheSPIfunctioninthisdeviceoffersthefollowingfeatures:
• Fullduplexsynchronousdatatransfer
• BothMasterandSlavemodes
• LSBrstorMSBrstdatatransmissionmodes
• Transmissioncompleteag
• Risingorfallingactiveclockedge
• WCOLandCSENbitenabledordisableselect