Rev. 2.50 100 June 22, 2017 Rev. 2.50 101 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
TM External Pins
EachoftheTMs,irrespectiveofwhattype,hasoneTMinputpin,withthelabelTCKn.TheTM
inputpin,isessentiallyaclocksourcefortheTMandisselectedusingtheTnCK2~TnCK0bitsin
theTMnC0register.ThisexternalTMinputpinallowsanexternalclocksourcetodrivetheinternal
TM.ThisexternalTMinputpinissharedwithotherfunctionsbutwillbeconnectedtotheinternal
TMifselectedusingtheTnCK2~TnCK0bits.TheTMinputpincanbechosentohaveeithera
risingorfallingactiveedge.
TheTMseachhaveoneormoreoutputpinswiththelabelTPn.WhentheTMisintheCompare
MatchOutputMode,thesepinscanbecontrolledbytheTMtoswitchtoahighorlowlevelor
totogglewhenacomparematchsituationoccurs.TheexternalTPnoutputpinisalsothepin
wheretheTMgeneratesthePWMoutputwaveform.AstheTMoutputpinsarepin-sharedwith
otherfunction,theTMoutputfunctionmustrstbesetupusingregisters.Asinglebitinoneofthe
registersdeterminesifitsassociatedpinistobeusedasanexternalTMoutputpinorifitistohave
anotherfunction.ThenumberofoutputpinsforeachTMtypeanddeviceisdifferent,thedetailsare
providedintheaccompanyingtable.
AllTMoutputpinnameshavean"_n"sufx.Pinnamesthatincludea"_1"or"_2"sufxindicate
thattheyarefromaTMwithmultipleoutputpins.ThisallowstheTMtogenerateacomplimentary
outputpair,selectedusingtheI/Oregisterdatabits.
Device CTM STM ETM Registers
HT66F20 TP0_0
TP1_0, TP1_1 — TMPC0
HT66F30
TP0_0, TP0_1 — TP1A, TP1B_0, TP1B_1 TMPC0
HT66F40
TP0_0, TP0_1 TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1
HT66F50
TP0_0, TP0_1
TP3_0, TP3_1
TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1
HT66F60
TP0_0, TP0_1
TP3_0, TP3_1
TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1
TM Output Pins