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Holtek HT66F30 - Standard Type TM Operating Modes

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Rev. 2.50 132 June 22, 2017 Rev. 2.50 133 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Standard Type TM Operating Modes
TheStandardTypeTMcanoperateinoneofveoperatingmodes,CompareMatchOutputMode,
PWMOutputMode,SinglePulseOutputMode,CaptureInputModeorTimer/CounterMode.The
operatingmodeisselectedusingtheTnM1andTnM0bitsintheTMnC1register.
Compare Match Output Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1register,shouldbesetto00respectively.
Inthismodeoncethecounterisenabledandrunningitcanbeclearedbythreemethods.Theseare
acounteroverow,acomparematchfromComparatorAandacomparematchfromComparatorP.
WhentheTnCCLRbitislow,therearetwowaysinwhichthecountercanbecleared.Oneiswhen
acomparematchfromComparatorP,theotheriswhentheCCRPbitsareallzerowhichallows
thecountertooverow.HerebothTnAFandTnPFinterruptrequestagsforComparatorAand
ComparatorPrespectively,willbothbegenerated.
IftheTnCCLRbitintheTMnC1registerishighthenthecounterwillbeclearedwhenacompare
matchoccursfromComparatorA.However,hereonlytheTnAFinterruptrequestflagwillbe
generatedevenifthevalueoftheCCRPbitsislessthanthatoftheCCRAregisters.Thereforewhen
TnCCLRishighnoTnPFinterruptrequestagwillbegenerated.IntheCompareMatchOutput
Mode,theCCRAcannotbesetto"0".
Asthenameofthemodesuggests,afteracomparisonismade,theTMoutputpin,willchange
state.TheTMoutputpinconditionhoweveronlychangesstatewhenanTnAFinterruptrequest
agisgeneratedafteracomparematchoccursfromComparatorA.TheTnPFinterruptrequestag,
generatedfromacomparematchoccursfromComparatorP,willhavenoeffectontheTMoutput
pin.ThewayinwhichtheTMoutputpinchangesstatearedeterminedbytheconditionofthe
TnIO1andTnIO0bitsintheTMnC1register.TheTMoutputpincanbeselectedusingtheTnIO1
andTnIO0bitstogohigh,togolowortotogglefromitspresentconditionwhenacomparematch
occursfromComparatorA.TheinitialconditionoftheTMoutputpin,whichissetupafterthe
TnONbitchangesfromlowtohigh,issetupusingtheTnOCbit.NotethatiftheTnIO1andTnIO0
bitsarezerothennopinchangewilltakeplace.

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