Rev. 2.50 126 June 22, 2017 Rev. 2.50 127 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Bit3 T1OC:TP1_0,TP1_1Outputcontrolbit
CompareMatchOutputMode
0:Initiallow
1:Initialhigh
PWMMode/SinglePulseOutputMode
0:Activelow
1:Activehigh
ThisistheoutputcontrolbitfortheTMoutputpin.Itsoperationdependsupon
whetherTMisbeingusedintheCompareMatchOutputModeorinthePWMMode/
SinglePulseOutputMode.IthasnoeffectiftheTMisintheTimer/CounterMode.In
theCompareMatchOutputModeitdeterminesthelogicleveloftheTMoutputpin
beforeacomparematchoccurs.InthePWMModeitdeterminesifthePWMsignalis
activehighoractivelow.
Bit2 T1POL:TP1_0,TP1_1OutputpolarityControl
0:Non-invert
1:Invert
ThisbitcontrolsthepolarityoftheTP1_0orTP1_1outputpin.Whenthebitisset
hightheTMoutputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasno
effectiftheTMisintheTimer/CounterMode.
Bit1 T1DPX:TM1PWMperiod/dutyControl
0:CCRP-period;CCRA-duty
1:CCRP-duty;CCRA-period
Thisbit,determineswhichoftheCCRAandCCRPregistersareusedforperiodand
dutycontrolofthePWMwaveform.
Bit0 T1CCLR:SelectTM1Counterclearcondition
0:TM1ComparatrorPmatch
1:TM1ComparatrorAmatch
Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe
StandardTMcontainstwocomparators,ComparatorAandComparatorP,eitherof
whichcanbeselectedtocleartheinternalcounter.WiththeT1CCLRbitsethigh,
thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA.
Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom
theComparatorPorwithacounteroverow.Acounteroverowclearingmethodcan
onlybeimplementediftheCCRPbitsareallclearedtozero.TheT1CCLRbitisnot
usedinthePWM,SinglePulseorInputCaptureMode.