Rev. 2.50 142 June 22, 2017 Rev. 2.50 143 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Capture Input Mode
ToselectthismodebitsTnM1andTnM0intheTMnC1registershouldbesetto01respectively.
Thismodeenablesexternalsignalstocaptureandstorethepresentvalueoftheinternalcounter
andcanthereforebeusedforapplicationssuchaspulsewidthmeasurements.Theexternalsignalis
suppliedontheTPn_0orTPn_1pin,whoseactiveedgecanbeeitherarisingedge,afallingedgeor
bothrisingandfallingedges;theactiveedgetransitiontypeisselectedusingtheTnIO1andTnIO0
bitsintheTMnC1register.ThecounterisstartedwhentheTnONbitchangesfromlowtohigh
whichisinitiatedusingtheapplicationprogram.
WhentherequirededgetransitionappearsontheTPn_0orTPn_1pinthepresentvalueinthe
counterwillbelatchedintotheCCRAregistersandaTMinterruptgenerated.Irrespectiveofwhat
eventsoccurontheTPn_0orTPn_1pinthecounterwillcontinuetofreerununtiltheTnONbit
changesfromhightolow.WhenaCCRPcomparematchoccursthecounterwillresetbacktozero;
inthiswaytheCCRPvaluecanbeusedtocontrolthemaximumcountervalue.WhenaCCRP
comparematchoccursfromComparatorP,aTMinterruptwillalsobegenerated.Countingthe
numberofoverflowinterruptsignalsfromtheCCRPcanbeausefulmethodinmeasuringlong
pulsewidths.TheTnIO1andTnIO0bitscanselecttheactivetriggeredgeontheTPn_0orTPn_1
pintobearisingedge,fallingedgeorbothedgetypes.IftheTnIO1andTnIO0bitsarebothset
high,thennocaptureoperationwilltakeplaceirrespectiveofwhathappensontheTPn_0orTPn_1
pin,howeveritmustbenotedthatthecounterwillcontinuetorun.
AstheTPn_0orTPn_1pinispinsharedwithotherfunctions,caremustbetakeniftheTMisinthe
InputCaptureMode.Thisisbecauseifthepinissetupasanoutput,thenanytransitionsonthispin
maycauseaninputcaptureoperationtobeexecuted.TheTnCCLRandTnDPXbitsarenotusedin
thisMode.