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Rev. 2.50 152 June 22, 2017 Rev. 2.50 153 June 22, 2017

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60

HT66FU30/HT66FU40/HT66FU50/HT66FU60

A/D Flash MCU with EEPROM

HT66F20/HT66F30/HT66F40/HT66F50/HT66F60

HT66FU30/HT66FU40/HT66FU50/HT66FU60

A/D Flash MCU with EEPROM

Compare Output Mode

Toselectthismode,bitsTnAM1,TnAM0andTnBM1,TnBM0intheTMnC1/TMnC2registers

shouldbeallclearedtozero.Inthismodeoncethecounterisenabledandrunningitcanbecleared

bythreemethods.Theseareacounteroverow,acomparematchfromComparatorAandacompare

matchfromComparatorP.WhentheTnCCLRbitislow,therearetwowaysinwhichthecounter

canbecleared.OneiswhenacomparematchoccursfromComparatorP,theotheriswhenthe

CCRPbitsareallzerowhichallowsthecountertooverow.HereboththeTnAFandTnPFinterrupt

requestagsforComparatorAandComparatorPrespectively,willbothbegenerated.

IftheTnCCLRbitintheTMnC1registerishighthenthecounterwillbeclearedwhenacompare

matchoccursfromComparatorA.However,hereonlytheTnAFinterruptrequestflagwillbe

generatedevenifthevalueoftheCCRPbitsislessthanthatoftheCCRAregisters.Thereforewhen

TnCCLRishighnoTnPFinterruptrequestagwillbegenerated.

Asthenameofthemodesuggests,afteracomparisonismade,theTMoutputpin,willchange

state.TheTMoutputpinconditionhoweveronlychangesstatewhenanTnAForTnBFinterrupt

requestagisgeneratedafteracomparematchoccursfromComparatorAorComparatorB.The

TnPFinterruptrequestflag,generatedfromacomparematchfromComparatorP,willhaveno

effectontheTMoutputpin.ThewayinwhichtheTMoutputpinchangesstateisdeterminedbythe

conditionoftheTnAIO1andTnAIO0bitsintheTMnC1registerforETMCCRA,andtheTnBIO1

andTnBIO0bitsintheTMnC2registerforETMCCRB.TheTMoutputpincanbeselectedusing

theTnAIO1,TnAIO0bits(fortheTPnApin)andTnBIO1,TnBIO0bits(fortheTPnB_0,TPnB_1

orTPnB_2pins)togohigh,togolowortotogglefromitspresentconditionwhenacomparematch

occursfromComparatorAoracomparematchoccursfromComparatorB.Theinitialconditionof

theTMoutputpin,whichissetupaftertheTnONbitchangesfromlowtohigh,issetupusingthe

TnAOCorTnBOCbitforTPnAorTPnB_0,TPnB_1,TPnB_2outputpins.NotethatiftheTnAIO1,

TnAIO0andTnBIO1,TnBIO0bitsarezerothennopinchangewilltakeplace.

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