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Rev. 2.50 264 June 22, 2017 Rev. 2.50 265 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
CPLA [m]
ComplementDataMemorywithresultinACC
Description EachbitofthespeciedDataMemoryislogicallycomplemented(1′scomplement).Bitswhich
previouslycontaineda1arechangedto0andviceversa.Thecomplementedresultisstoredin
theAccumulatorandthecontentsoftheDataMemoryremainunchanged.
Operation ACC←[m]
Affectedag(s) Z
DAA [m]
Decimal-AdjustACCforadditionwithresultinDataMemory
Description ConvertthecontentsoftheAccumulatorvaluetoaBCD(BinaryCodedDecimal)value
resultingfromthepreviousadditionoftwoBCDvariables.Ifthelownibbleisgreaterthan9
orifACagisset,thenavalueof6willbeaddedtothelownibble.Otherwisethelownibble
remainsunchanged.Ifthehighnibbleisgreaterthan9oriftheCagisset,thenavalueof6
willbeaddedtothehighnibble.Essentially,thedecimalconversionisperformedbyadding
00H,06H,60Hor66HdependingontheAccumulatorandagconditions.OnlytheCag
maybeaffectedbythisinstructionwhichindicatesthatiftheoriginalBCDsumisgreaterthan
100,itallowsmultipleprecisiondecimaladdition.
Operation [m]←ACC+00Hor
[m]←ACC+06Hor
[m]←ACC+60Hor
[m]←ACC+66H
Affectedag(s) C
DEC [m]
DecrementDataMemory
Description DatainthespeciedDataMemoryisdecrementedby1.
Operation [m]←[m]−1
Affectedag(s) Z
DECA [m]
DecrementDataMemorywithresultinACC
Description DatainthespeciedDataMemoryisdecrementedby1.Theresultisstoredinthe
Accumulator.ThecontentsoftheDataMemoryremainunchanged.
Operation ACC←[m]−1
Affectedag(s) Z
HALT
Enterpowerdownmode
Description Thisinstructionstopstheprogramexecutionandturnsoffthesystemclock.Thecontentsof
theDataMemoryandregistersareretained.TheWDTandprescalerarecleared.Thepower
downagPDFissetandtheWDTtime-outagTOiscleared.
Operation TO←0
PDF←1
Affectedag(s) TO,PDF
INC [m]
IncrementDataMemory
Description DatainthespeciedDataMemoryisincrementedby1.
Operation [m]←[m]+1
Affectedag(s) Z
INCA [m]
IncrementDataMemorywithresultinACC
Description DatainthespeciedDataMemoryisincrementedby1.TheresultisstoredintheAccumulator.
ThecontentsoftheDataMemoryremainunchanged.
Operation ACC←[m]+1
Affectedag(s) Z

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