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HP 2100 Series User Manual

HP 2100 Series
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4.7.3 Tracing and Registers
When a debug log has been established, tracing may be configured by specifying one or more of the reporting level
options:
Option Reporting Level
CMDS
Command initiations and completions
CPU
Words received from and sent to the CPU
BUF
Data read from and written to the channel buffers
XFER
Data receptions and transmissions
IOBUS
I/O bus signals and data words received and returned
The CMDS option traces the commands executed by the multiplexer. The CPU option traces words received from
(control and write data) and sent to (status and read data) the CPU. The BUF option traces reads and writes from
the internal channel buffers. The XFER option traces the characters sent and received from the multiplexer
channels. The IOBUS option traces the I/O backplane signals and data received and returned via the interface.
Examples of the trace formats follow:
>>MPX cmds: [OTx] Command 037 parameter 100000 scheduled, time = 1250
>>MPX cpu: [Lix,C] Status = 102000
>>MPX buf: Port 2 character 'A' get from read buffer [73]
>>MPX xfer: Port 0 character LF transmitted
>>MPX iobus: Received data 000000 with signals STF
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HP 2100 Series Specifications

General IconGeneral
Uplink Ports2 x combo Gigabit SFP
MAC Address Table Size8000 entries
ManagementSNMP
FeaturesQuality of Service (QoS), VLAN support
Jumbo Frame SupportYes

Summary

Simulator Features

Hardware-Equivalent Actions

Maps front-panel actions to simulation console commands for hardware simulation.

Simulator-Specific Commands

Details simulator commands for numeric and symbolic display/entry.

Processor Device Simulations

Central Processing Unit

Details CPU options, memory, firmware, and configuration commands.

Bootstrap Loaders

Explains loading programs using bootstrap loaders for 21xx and 1000 series CPUs.

Simulation Stops

How to configure simulation stops for unimplemented/undefined instructions or I/O errors.

Direct Memory Access and Memory Protect

Simulates DMA/DCPC controllers and memory protection features.

Programmed General I/O Device Simulations

Processor Interconnect

Simulates inter-CPU communication for HP 2000 Time-Shared BASIC systems.

Programmed Disc I/O Device Simulations

Programmed Magnetic Tape I/O Device Simulations

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