The Alarm Register
The Alarm register group is used to report the status of the four
instrument alarm limits. Any or all of these alarm conditions can be
reported to the Alarm Register summary bit through the enable register.
To set the enable register mask, you must write a decimal value to the
register using the STATus:ALARm:ENABle command.
Bit Definitions – Alarm Register
The Alarm event register is cleared when:
• You execute a *CLS (clear status) command.
• You query the event register using the STATus:ALARm:EVENt? command.
The Alarm enable register is cleared when:
• You turn on the power (*PSC does not apply).
• You execute the STATus:PRESet command.
• You execute the STATus:ALARm:ENABle 0 command.
Bit Number
Decimal
Value Definition
0 Alarm 1
1 Alarm 2
2 Alarm 3
3 Alarm 4
4 Queue Empty
*
5 Queue Overflow
6
Not Used
15
Not Used
1
2
4
8
16
32
64
32768
Alarm occurred on Alarm 1.
Alarm occurred on Alarm 2.
Alarm occurred on Alarm 3.
Alarm occurred on Alarm 4.
Alarm queue status (0 = empty, 1 = not empty).
Alarm data lost due to alarm queue overflow.
Returns
“0”.
Returns
“0”.
*
The Condition Register implements only bit 4.
Chapter 5 Remote Interface Reference
The SCPI Status System
284
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