HP 4262A - Page 173

Section VIII
Paragraphs 8-19 and 8-20
8-19. Display Control converts the measurement
data signals from the nanoprocessor to display
component signals which are so coded that corres-
ponding numeric figures are displayed on the 7
segment LED displays. The measurement data is
momentarily stored in a memory in this section
and sent, in turn, to the matrix drive of each digit
of the displays. The alphabetic PASS FAIL, U-CL,
and O-F annunciations are illuminated directly on
the display by annunciation signals coded by the
nanoprocessor. This section also includes a clock
generator which employs a crystal resonator to
provide the digital section with accurate timing.
Model 4262A
8-20. The nanoprocessor centered control and
other digital sections are connected to a data bus
line (8 bit) on which the measurement data and
nanoprocessor I/O signals are transferred. This data
bus line serves the overall digital section including
the optional sections when the instrument is equip-
ped with HP-IB Compatible (Option 101), BCD
Data Output (Option 001), or Comparator (Option
004) option. The timing of the handshakes with
system controller (such as a calculator), data trans-
fer, and comparative data are also managed via the
data bus line by the nanoprocessor. The operating
principles of the option sections are discussed in
the paragraphs entitled Options.
C OFFSET //—leo°
(-] (-]
TR
—-90
L OFFSET
b
-180°
(©] ——0
{>_‘ :—[>+90°
~90
Ro P 2l
S
Ah
DUT
The influence of stray capacitance and residual
inductance
of
the
test
jig
can
be
offset
from
the
current
flowing
through
the
range
resistor
Rr
by
establishing an opposition current flow through
the junction of the unknown device and Rr. The
C
and
L
offset
circuits
develop,
respectively,
currents
which
are
phase
shifted
by
-90
and
+90
degrees as referenced to the oscillator output.
The
changes
in
phase
are
reverse
those
of
the
effects
of
the
capacitance
and
inductance
of
the
test
jig.
When
the
offset
currents
are
properly
adjusted,
the
offset
currents
and
the
undesired
component
of
the
test
jig
measurement
current
cancel each other.
Figure 8-4. Offset Control Principle.
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EXT. OC BIAS
Figure 8-5. DC Bias Circuit.
8-6