3-8 www.hp.com Technical Reference Guide
Processor/Memory Subsystem
Figure 3-3 shows the system memory map.
✎
All locations in memory are cacheable. Base memory is always mapped to DRAM. The next 128
KB fixed memory area can, through the north bridge, be mapped to DRAM or to PCI space.
Graphics RAM area is mapped to PCI or AGP locations.
Figure 3-3. System Memory Map
High BIOS Area
DMI/APIC
PCI
Top of DRAM
16 MB
4 GB
TSEG
IGC (1-64 MB)
DOS
640 KB
FFFF FFFFh
1 MB
Main
BIOS
00FF FFFFh
FFE0 0000h
000F FFFFh
Base Memory
Extended BIOS
Legacy Video
Expansion Area
0000 0000h
0010 0000h
0100 0000h
Main
Area
F000 0000h
Memory
Area
Memory
Memory
Area
Compatibilty
Area
Main
Memory
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