HP dx7300 User Manual

5-2 www.hp.com Technical Reference Guide
Input/Output Interfaces
SATA Configuration Registers
The SATA controller is configured as a PCI device with bus mastering capability. The PCI
configuration registers for the SATA controller function (PCI device #31, function #2) are listed
in Table 5-1.
SATA Bus Master Control Registers
The SATA interface can perform PCI bus master operations using the registers listed in Table
5-2. These registers occupy 16 bytes of variable I/O space set by software and indicated by PCI
configuration register 20h in the previous table. As indicated, these registers are virtually a copy
of those used by EIDE operations discussed in the EIDE section.
Table 5-1.
SATA PCI Configuration Registers (82801, Device 31/Function 2)
PCI Conf.
Addr. Register
Reset
Value
PCI Conf.
Addr. Register
Reset
Value
00-01h Vender ID 8086h 0F..1Fh Reserved 0’s
02-03h Device ID 24D1h 10-17h Pri. Cmd, Cntrl.
Addrs.
1 (both)
04-05h PCI Command 0000h 18-1Fh Sec. Cmd, Cntrl.
Addrs.
1 (both)
06-07h PCI Status 02B0h 20-23h BMstr Base Address 1
08h Revision ID 00h 2C, 2Dh Subsystem Vender ID 0000h
09h Programming 8Ah 2E, 2Fh Subsystem ID 0000h
0Ah Sub-Class 01h 34h Capabilities pointer 80h
0Bh Base Class Code 01h 3Ch Interrupt Line 00h
0Dh Master Latency Timer 00h 3Dh Interrupt Pin 01h
0Eh Header Type 00h 40-57h Timing, Control All 0’s
Table 5-2.
IDE Bus Master Control Registers
I/O Addr.
Offset
Size
(Bytes) Register Default Value
00h 1 Bus Master IDE Command (Primary) 00h
02h 1 Bus Master IDE Status (Primary) 00h
04h 4 Bus Master IDE Descriptor Pointer (Primary) 0000 0000h
08h 1 Bus Master IDE Command (Secondary) 00h
0Ah 2 Bus Master IDE Status (Secondary) 00h
0Ch 4 Bus Master IDE Descriptor Pointer (Secondary 0000 0000h

HP dx7300 Specifications

General

Brand	HP
Model	dx7300
Category	Desktop
Language	English