~-----~----~-------------·~~---~---~-·
Add Subtract
RR
+
RX
A
AR
5
SR
0B730
Sronch and
link
RR
-+
RX
OA500
Branch
on
Con::lition
BC
+
BCR
QA700
Bronch
On
Count
BCT
1"
SCTR
QA700
Branch
CJ,;l;;-l.~-BXHSXi.E
--
-
--
--
----
----0Jo00 ·
Bronch Entry
to
I-Fetch
QTl20
Bring
Up
Aids QW
111
Bring Up Aids Two Words of
One
Bih
QW222
Bump
~!<?~~-~e~~~I
---
..
-~----~--~
-·-~---·-··---···
QY140
CCWl
Routine
Selector
Chonne!
QVl02
CCW2
Routine
Selector
Channel
Q\1103
Common Mask Trap Sense
OB730
Compares - Alg.:broic Logical RR+
RX
CR
C
CLR
CL OB500
Compare
Q_ecim~LQ~omparison
of
1st
Wd
~·-L-------~--
05200
Compare
Decimal
CP
Comparison
of 1st
Wd
Opnd
I ----a52o2
Compare
logical
SS
QPlOO
Compare
Routine
Selector
Channel
QVl
l 1
Command
Chain
Unit
Adrh~ss
Compare
02-Mpx
OV330
C~..!:!!
__
to
Sin~
_
_cva
__
f~_'.!'~cimaL__
______
QE900
Convert
to
Decimal
from Binary CVD
--
--~---OSiJ2
Decimal
Add
AP
Subtract
SP
First Work Assembly
QS
110
Decimal
Add
AP
Aubtract
SP
Add
Subtract
Inner Loop
QS
114
Decimal
Add
AP
Subtract
SP
G2
Counter
Less
than
Four
QSI
16
Decimal
Add
AP
Subtro~t
SP
Gl
Count;;.--Lo-t~hZero
C~k
OverfT;w~
--~---QS~
Decimal
Add
AP
Subtract
SP
Recomplement
and
End Routine
05120
Decimal
Arithmetic
Second
level
I-Fetch
05010
Diagnose
Instruction
OYl
10
Direct
Dato
Wrd
RDD
QJ400
Divid;-D;cimal
Op
Di~idend
Assembly-------------------05300
Divide
Decimal
- Loop for
Single
Word
DVR
Sign Insertion
OS302
Divide
Decimal
- Loop for
Double
Word Divisor 0530-4
Divide
Decimal
Ouotient
Store
Dividend
Fetch
QS306
Divide
Decimal
Remainder Assembly
OS308
Edit Edit
and
Mork
ED
EDMK
Initial
Left
Digit
S
Off
OP200
Edit Edit
and
Mork
ED
EDMK Left
Source
Digit
S
On
QP202
Edit
Edit
and
Mark
ED
EDMK Right Source
Digit
S
Off
0P203
Edit Edit
and
Mork
ED
EDMK Right Source
Digit
S
On
QP204
Edit Edit
and
Mork
ED
EDMK Store
Fetch
Pattern
Source
OP205
Edit -Edit-
;;~d-
Ma-~k-E
ITDMKs;tCo-~~·ffti
on
Reg-
onci
G-;n-;;.~9-1----··--·
------op 206
End
Update
Routine
Selector
Channel
OV106
Execute
Instruction
QE400
f_~~t!d
Poi0~~tiply
~~!f__~.9!:~~nd
RX
For~a_!_
____
..
QBBOO
F;xed Po;nt
RR
Londs
LPR
LNR
LTR
LCR
LR
-osliio-
Fixed
Point
Multiply
Post Loop Routine OB801
Fixed
Point
Divide
DR
+ D
Divide
Loop
08901
Fixed
Point
Divide
D~
+.D_Post
loo__p
__
~OJ'TlE)ementii:'._9
_____
-··---~-
08902
Fixed~fXCO-olsTa-;:;-·--
---
·-----
-··
··------QF100
F!ooting
Point
Halve
RR
Long
and
Short
OG200
Floating
Point
Load/Store
RR/RX
Format
Long/Short
QG300
Floating
Point
Operations
Second
level
Decode
OG3l0
Float
in Point_ Add
Subtract
Compare
RR
RX
Format
Lo!19_li:._o..!:!..__
_____
~---
OG~O
Floating
Point
Add
Subtract
Compare
Determine
the
Exponent
Difference
QG40i
Floating
Point Add
Subtract
Compare
Calculate
the
Exponent
Di
ff
-
RR
Long
QG402
Floating
Point Add
Subtract
Compere
Pre-Shift
0 through 5
OG403
Floating
Point
Add
Subtract
Compare
Pre-Shift
6
through
8
OG404
£JE~_!.0.s__~~
~Subtract
Compere
Pre_-Shift 9
thro~~-J.§
..
___________
__QG_:4Q.5
Floating
Point
Add
Subtrcct
Compare
Short Add
Normal
Complement
of
FR
0G406
Floating
Point
Add
Subtract
Zero
Test
Check
Mask
QG409
Floating
Point
Add
Subtract
Compare
Recomplement
Guard
Digit
QG416
Floating
Point
Divide
Short
RR
RS
Pre-Normalize
OG500
__
!:-.IE~-i~Point_i;?:YD
N
DER
NDE Exponent
Subtractio~----
__
__
____
QG.2Ql
Floating
Point
DVD N
DER
NOE
Divide
Loop for
FR
QG502
Floating
Point
DVD N
DER
Post-Normalize
QG503
Floating
Point
Multiply
RR
RX
Format
long
Short
QG700
Floating
Point
Multiply
Mply
Loop
QG701
Floating
PoJ.~--~~.~_i.e_!t__~~~1:_N~~-~-all_z~-~~ro
Te_s!
~----
OG702
FLT
Compare
and
Branch
QY510
FLT
Load
Coll
Kernel
0Y140
FP
long
Multiply
Divide
MOR
MD
DOR
DD
- Prenorm
QG800
FP
long
Multiply
Divide
MIER
DVD
Prenorm Exp Arith
QG801
FP
Lon
Mu_ll;p_iy_MDR
MQ
MCD
Mult~Mult
Loop _ QG002
FP
Long
Mult;ply
MDR
MD
Mu/t;ply
Loop
OG803
FP
long
Multiply
MOR
MD End Routine -
Post-Normalize
QG804
FP
OG900
Free
Entry CY2
OTJ
00
Half-Word
Store S
TH
Half-Word
Ops
- Common
Setup
LH
CH
AH
SH
MH
Hoh
Loop
and
EXC Sensing
Instruction
Fetch
First C
cle
Instruction
Fetch
Second
Page
Interrupt
Routine
Selector
Channel
Invalid
Ops
Invalid
Op
Groups
Invert
SAR
Kernel
I 0
Op
Countdown
Loop
~-;:;d
Respon-;-;---------------
IPL
IPL
Status
Analysis
FIGURE
4.
CAS
LOGIC
DIAGRAM
PAGE
KEY
14 (3/71) Model 50 FEMM
OE555
OE580
OT200
OTIOO
QTI
10
OVl07
OMlll
ONlll
0Yl40
OK701
QKBOO
OKBOI
Long and
Sh_ort
F
looting
Point Loads
that
Refer
to
Sign
Long
Floating
Point Add of
Fraction
with
Tests for
Complement
Normal
Long
Floating
Point Add Subt
Compare
Cmpl
Normalizing
Zero
Test
Load P
SW
L
PSW
Set
System Mask
SSM
~a~
_?t~r~
Mu!~iE>l~_l~
_
_?T_~--
Ldod 64 - CPU Mode
OGIOO
QG407
0G40B
QJ200
0K666
---0Kl05
local
Store Diagnostic$
0Y130
Local Store
Write
Routir:e
Selector
Channel
OV108
Local Store Read Routine
Selector
Channel
OV109
Log;col Add Subtract
RR
RX
AL
SL
ALR
SLR
QB750
Logical ond
Movel~St·r~Cii~~SSS-~frests-1nitioliz~"tion
------·----
-----···---
-
OPSOO
logical
and
Move
Instruction
SS
Main
loop
OP810
Logical
and
Move
tnstrnction
SS
Overlap
Routine
OP820
Logical ond
Move
Instruction
SS
End
Routine QPB30
log
Out
Sc
on
Out
Qy
41
O '
Mpx(h-~~;~~~;-
Handling
--------~------OKl~
Mpx Chon
Count
Equals
Zero
Analysis
0V270
I
Mpx
Chon
Count
and
Fetch
and
Update
OV2
l O
Mpx
Chon
Data
Address
Fetch
and Update
OV220
M x
Chan
Dato
Handling
Input
QV23~
~~~-~~~~~~if~~~;!:~~
f
~i:~~~~rd
_ .
---
-··--
_OgQg·--~~~-·-~~
2
..
;~-~.-~:~.
~Chon
End
Status Ariolys_;,
____
,__________
_ _
...
Mpx
Chon
Command
Chain
End
Status Analysis
Mpx Chan
Interrupt
Preparation
OV820
Mpx
Chon
Sequence
Control
Fetch
OV410
I
Mpx
Chon
Stort
1/0
Unit
Select
QV420
M 2- Chon
Stort_
1/0
Unit
Addres~~_e?_r_~----
OV430
Mpx Chon
Start
1/0
Status
Analysis
--~-----------·--
Qg~V44:6ITT
0
o
0
Mpx
Chon
Count
Store
Mpx Chan
Data
Store
Mpx Chon
Check
Handling
QV840
M x Chon
PCI
OV260
Mpx
ChonTest.-1~/6-u;:;-it-s;;ie-c·t
I Mpx Chon Test
1/0
Unit
Address Compare
I
Mpx
Chan
Test
l/O
Accept
Status
Mpx
Cl-ton
Control
Check
Handling
~.
~~-~~~!;;;-~~~~r.~:i~~.i~'.'-~;le-ct
I
~px
Chon Test
i/O
Unit
Select
I Mpx Chan
Count
Arldress
Fetch
- Store
i Mpx Chon
Control
Word l
Fetch
~-~~~
__
Chan
_Commo~d.
~h~in_
0_i!i9.!
S_~atus_f.ncilysis
..
I
Mpx Chon
Fetch
Second
Hcilf of
Chon
Control
Word
Mpx
Chan
Control Word 2
Fetch
~
'
Mpx Chan
load
64
Peep
Mpx Chon Doto
Chaining
M__l:'_,~ip_!y
__
~eci_~o.1
!v\P_
E__i_~oJ
£>_r_~~~t~~':~bly_.
..
·-··-
______
_
Multiply
Decimal
- Single
and
Double Word Mpy Loops
Product
-Store
i
Multiply
Divide
Decimal
MP
DP
Opnd
2 Assembly
MPCN/DVR
I
Multiply
Divide
Decimal
MPCN
Obiing Set
Quotient
Sign Sel Mplr Digit
I Pock Move
w1
th
Offset
r-R~~d
St~1e
Ro~trn:S;;-1e~to1
Chonne I -
Reset Errc.r Register Kernel
~
Restore
CPU Mode Sel Mpx
Chon
ROS
~arced
Addressed tor Prag Traps - Address
Data
Spec Prot
RR~
RX
Fixed Point Secor1d Level
I-Fetch
1
RR~
Rx
AND
OR-fxclus1_;;
OR
____
-
V520
QV540
OV550
OV850
OVBIO ;
ov62o1
OV530 I
OV360 I
0\/310
QV340
ov-32()-1
0\1321 i
0'/830
0V370
QS406 '
05404
-·~
05400
i
--~:;;
__
~
OVl05
I
0Yl40
I
ov112
/
01300
..
- -
-~QAJ_il__]
QB400 i
OJOll
I
OEIOO
I
~
RS
-,-
SI
Second Leve! I
~Fetch
8 • 9
R.
X Con.trol -
.L.
cod
.. Address
lnser·t···S·
tore
Character
s~~'.1-~/0
_lnt!!ru_et___
-----
---
__________
9~~
Second
Level
I-Fetch
for
VFL
Character
Ops
1 Shift
~eft
Logic'ol
SLL
I Shift Right Logicol
SRL
I Shift Left
Algebraic
SLA
r?_hJ_f.!__~~!__~!ge_broic
s~~---
-
I Shift Left Double Logical
SLDL
Shift Right
Double
Logical
SRDL
Shift Left Double
Algebraic
SLDA
Shift Right Double
A!gebrojc
SRDA
SI
Compare
CU
Test
unsJ_er
Mo~k
T_U~M~~--
SI
Move
and
Logical
Ops
MVI
Nt
01
XI
Start
1/0,
Halt
1/0,
Test
1/0,
Test
Chan,
Proc with
Interrupt
Start
1/0
Routine
Selector
Channel
Store Display
OPOIO
I
0J090
OJOBO
,
1
'
01110
--
_Qll_OQ__j
QJl3Q I
QJl20
:
0Jl50
;
0Jl40
'
QK5S5_j
OK222 I
0K700
OVIOO
OT220
Stora
e
Protect
lnstructiqm
STG + ITG Store
To
SVC ond
SAM
-
RR
Control
Op~
+ Insert
To.__
_________
g~~"-:7.gC--1
System Reset
IPL
PSW
Restart
OUIOO
Time
Out
Check
Loop
18
Test
On
S~ort
1/0
QK702
~~:~~~;d~=n~::::~~~~;~:~,t~l~~~~~~~~~~t------------·~---7§~!~~~~<--I
Trap
Sequence
- Store
PSW
OT310
Trans
In
Chan
Routine
Selector
Channel
OVlOl
Unpock
Non-overlapped
Fields
Unpack
-
Op
I Storage
Op
2 Fetch
Zero
Insertion
Unpoc
ver
oppe
ie
s
Unit
Address
Fetch
Routine
Selector
Channel
Write
Fetch
Routine
Selector
Channel
Zero
and Add
OS600
OS601
OVllO
OVI04
05700
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