SECTION 11 CIRCUIT
DESCRIPTION
11-1
RECEIVE CIRCUITS
(1)
RF CIRCUITS
•
RF UNIT
(2)
IF CIRCUITS
•
RF UNIT
•MAIN
UNIT
The receive signal from the antenna connector is
fed to J10
of the
RF
unit in the
receiver
circuit when D4 is
turned
OFF and RL1 on
the CONNECTOR unit is turned
ON.
The incoming signal
to
the
RF
unit passes
through
an "L" attenuator,
consisting
of R92
and
R93 on the RF unit,
for 20dB of attenuation
when
the
PREAMP/ATT
SWITCH is set to the
ATT
position.
The BPF switching voltage is
obtained with IC1 and IC2 by
decoding
the
B1
~
B-1 1
band signals from
the LOGIC unit.
The ON/OFF switching voltage is provided by
IC2.
R13V
is
pro-
vided from the OR gate consisting of D5 and D6.
The
attack
time
of
this
control voltage is
determined
by
R9 and
RIO. The
immediate
release is
provided
by D1
and D2 when
switching
to
the transmit
mode.
09 and
01 0
comprise
a
double-balanced mixer using low-noise
2SK125 J-FETs. The mixer, driven
with 13.8V, provides
an
excellent
noise
figure and converts the incoming
signal to the
70.4515MHz
first
IF signal.
The first
LO
output signal
from
the
PLL unit
is
fed through a
high-pass
filter, is
amplified by
02,
is
filtered
by a
low-pass
filter,
and
then
is
applied
to
the first mixer
as
its local oscillator
signal
(70.5515
~
100.4515MHz).
R18, L13 and Cl 4
are for
feedback
to
improve
the
frequency characteristics of
Q2.
The
first IF signal is filtered by the FI1 monolithic
crystal filter
(±7.5kHz/-3dB) and is then
amplified
by
the 08 dual-gate
FET.
The second gate of 08 is
controlled
by
the AGC voltage.
The signal is
fed through the
D19
T/R switching
diode and
a
high-pass filter to the second
IF mixer of the IC3
double-balanced
mixer
where the signal is
converted
to the
9.0115MHz second
IF
signal. The signal
is
then filtered by
a
low-pass filter to
remove the
local oscillator components and
is
fed
to
the MAIN
unit through
P3.
The second
LO
signal
(61.44MHz)
from
the PLL
unit is
fed
to
IC3
as
the
local
oscillator signal for the second
mixer.
The
IF
signal from the RF
unit passes through
a
noise
blanker
circuit,
and
is
supplied
to a
9MHz filter through the 033 amplifier.
The
signals always are passed through the noise blanker which is con-
trolled
by a noise
blanker
gate
consisting of
D68
~
D71
called
a
double-balanced diode switch. If
the
noise blanker detects pulse
noise, the blanker
puts out a control
voltage via
D72
which momen-
tarily
cuts off the signal.
The 9MHz filter circuit consists of FI2, FIS and
a
bypass
circuit.
The signal from the filter circuit
is
supplied
to
the IC10
mixer
through the 084 buffer amplifier, and
is
converted to a
455kHz
signal. The
signal is
then fed through 039
to a
455kHz
filter
circuit
consisting of FI3, FI4, FIB, FI6 and an optional filter.
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