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• B-BAND CIRCUIT (2NDDVCO BOARD)
The 2nd D-VCO circuit (Q1 and D1) generates 247.0500
MHz and 286.3500 MHz. The oscillated signal is applied to
the 2nd mixer (RF unit; IC16, pin 3), and is then mixed with
the 1st IF signal.
A part of oscillated signal from the 2nd C-VCO circuit is
applied to the PLL IC (IC1, pin 8) as the comparison signal,
and is then output from pin 5. The signal passes through the
loop filter (R14, R15 and R22), and is then applied to the 2nd
D-VCO circuit again as PLL lock voltage.
4-2-5 3RD LO CIRCUIT (RF UNIT)
The 3rd LO circuit uses 19.2 MHz reference signal which is
generates at the X1 and Q556.
• A-BAND CIRCUIT
The 19.2 MHz reference signal is amplified at the LO ampli-
fier (Q540), and is then applied to the FM IF IC (IC2, pin 2)
as the 3rd LO signal.
The signal is mixed with 2nd IF signal to convert into 3rd IF
signal. The 3rd IF signal is applied to one of demodulator
(FM/WFM/AM/SSB) circuits.
• B-BAND CIRCUIT
The 19.2 MHz reference signal is amplified at the LO ampli-
fier (Q555), and is then applied to the FM IF IC (IC17, pin 2)
as the 3rd LO signal.
The signal is mixed with 2nd IF signal to convert into 3rd IF
signal. The 3rd IF signal is applied to the each demodulator
(FM/WFM/AM) circuits.
4-2-6 DOWN CONVERTER VCO CIRCUIT
(DOWNCONV BOARD)
The DOWN CONVERTER circuit uses 19.2 MHz reference
signal which is generates at the X1 and Q556 on the RF unit.
The DOWN CONVERTER VCO circuit (Q1 and D3) gener-
ates 1001 MHz or 2002 MHz. The oscillated signal is ampli-
fied at the buffer amplifier (Q4), and passes through band
switch.
When receiving 1305–2305.999 MHz RF signals, 1001 MHz
LO signal is selected. The RF signals pass through band
switch (D6), and then pass through another band switch
(D8).
When receiving 2306–3304.999 MHz, 2002 MHz LO signal
is selectd. The RF signals pass through the band switch
(D5), and then pass through the high-pass filter (L9, L10 and
C28–C32). The signals passes through another band switch
(D7).
The 1001 MHz or 2002 MHz LO signal is applied to the
mixer circuit (IC3, pin 3).
A part of oscillated signal from the DOWN CONVERTER
VCO circuit is amplified at the buffer amplifier (Q2), and is
then applied to the PLL IC (IC4, pin 8) as the comparison
signal, and is then output from pin 5. The signal passes
through the loop filter (L6, C21, C22 and C40), and is then
applied to the DOWN CONVERTER VCO circuit again as
PLL lock voltage.
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