EasyManua.ls Logo

Infineon AN230264 - Sample Code

Infineon AN230264
39 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Reset Release
Hardware ROM Boot Process
Reset_Handler of CM0+
Disable Global Interrupts
Disable RAM ECC
Initialize RAM of Stack Area
Initialize RAM of all Area
Enable RAM ECC
Copy Vectors from ROM to RAM
Prepare System Call
Call Compiler-specific Startup Function
main()
The main function of the boot process is to configure the system.
Apply trims
Lifecycle stage and protection from eFuse and supervisory flash
Authenticate FlashBoot
Debug and Test Access Restrictions
System protection setting
SWD initialization
When access restrictions prohibit any use of the SWD interface, the boot
process does not access or change the SWD pins in any way.
By default, global interrupts are enabled in hardware. In the first step of the reset
handler, the interrupts are disabled. So, you can enable them manually in main().
Disable RAM ECC.
Initialize RAM and then call C startup code startup code.
Initialize RAM of all Areas Except Stack Area.
Enable RAM ECC.
Copy the Vector table.
Prepare necessary configurations to get SROM system calls working.
Compiler-specific low-level C library startup functions.
Initialize data sections
Jump to main function
Continue execution of CM0+ user application.
Boot process is executed
Figure 6 Device startup flow
Note: See the architecture TRM (References) for more details on lifecycle stages and protection bits.
3.2.4 Sample code
Code Listing 1 Sample code for CM0+ startup and Code Listing 2 Sample code for CM0+ main function show a
sample code for the CM0+ startup and main function respectively.
Getting started with PSoC
HV PA family
3 Development environment and tools
Application note 14 002-30264 Rev. *B
2023-04-19

Related product manuals