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Infineon XENSIV TLI4971 - Interface Description; Command Structure; Read; Write Command

Infineon XENSIV TLI4971
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Application Note 10 of 31 Rev. 1.30
2022-03-01
Current Sensor TLI4971
Programming Guide and User Manual
3 Interface description
3.1 Command Structure
A typical SICI communication consists in multiple input commands sent to the device via A
OUT
voltage
modulation, to which the sensor responds modulating the same A
OUT
pin.
An input command is composed of 16 bits LSB first. One bit consists of a transmission sequence initiated by the
master and a receiving sequence driven by the device. The reply data stream sent by the device starts with the
LSB.
A typical communication consists of a command including the access information and address sent by the
master to the device. The device replies with data from the former received command. The upper nibble of the
command include the access information.
Table 3 SICI Command structure
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LSB
w/r
0
Ac1
Ac0
Ad7
Ad6
Ad5
Ad4
Ad3
Ad2
Ad1
Ad0
0
0
0
0
Table 4 Access bit description
w/r
Ac1
Ac0
description
1
0
X
Set ones and zeros like the sent 16 bit data word
1
1
0
Set only the sent zeros. The ones will not be set
1
1
1
Set only the sent ones. The zeros will not be set
3.2 Read / Write Command
There is always a delay of one command between the request command and the addressed data. When a new
read command is sent to the sensor, the device replies with the data requested with the former command. The
NOP command terminates a read sequence without initializing a new read or write sequence.
0 0
2 bit
access
8 bit
address
0000" 16 bit NOPcommand
read one address
Master to Sensor
Sensor to Master 16 bit dont care 16 bit addressed data
read
0 0
2 bit
access
8 bit
address
0000"
16 bit dont care 16 bit addressed data
0 0
2 bit
access
8 bit
address
0000" 16 bit NOPcommand
16 bit addressed data
Master to Sensor
Sensor to Master
Figure 10 SICI read sequence
1 0
2 bit
access
8 bit
address
0000" 16 bit data to set in EEPROM
write to address
16 bit last addressed register 16 bit addressed data
Master to Sensor
Sensor to Master
Figure 11 SICI write sequence

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