Infineon XENSIV TLI4971 - Programming Example

Application Note 17 of 31 Rev. 1.30
2022-03-01
Current Sensor TLI4971
Programming Guide and User Manual
Symbol
Setting
level
x FS
S1
S2
S3
S4
S5
S6
I
THR2.1
0.50
0E
hex
0B
hex
07
hex
0E
hex
09
hex
04
hex
I
THR2.2
0.61
13
hex
0F
hex
0A
hex
13
hex
0D
hex
06
hex
I
THR2.3
0.71
17
hex
12
hex
0C
hex
17
hex
10
hex
08
hex
I
THR2.4
0.82
1B
hex
*)
16
hex
0F
hex
*)
1C
hex
*)
13
hex
0B
hex
*)
I
THR2.5
0.93
1F
hex
1A
hex
12
hex
21
hex
17
hex
0D
hex
I
THR2.6
1.04
24
hex
1D
hex
15
hex
25
hex
1A
hex
0F
hex
I
THR2.7
1.14
28
hex
21
hex
17
hex
2A
hex
1D
hex
11
hex
I
THR2.8
1.25
2D
hex
24
hex
1A
hex
2E
hex
21
hex
14
hex
*)
Standard setting datecode 2118 and later
Table 11 Functional description Address 42
hex
Bit field
name
Bit
Type
Bit field description
Default
value
CRC
7:0
rw
CRC calculation is byte by byte, starting from address 42
hex
. After reaching the
end of the EEPROM (address 51
hex
), the address 40
hex
to 41
hex
are append. The
CRC calculation is based on the polynomial x
8
+x
4
+x
3
+x
2
+1
-
VREF
ext
10:8
rw
Symbol
Setting
Description
1V65
0
hex
V
REF_nom
= 1.65 V (±10% if ratiometricity is enabled)
standard setting
1V2
1
hex
V
REF_nom
= 1.2 V (±10% if ratiometricity is enabled)
1V5
2
hex
V
REF_nom
= 1.5 V (±10% if ratiometricity is enabled)
1V8
3
hex
V
REF_nom
= 1.8 V (±10% if ratiometricity is enabled)
Standard is set to 1.65V
000
Not used
11
rw
Not used
0
QV1V5
sd
12
rw
The bit enables the quiescent voltage to 1.5V in semi-differential.
Default is 0 (=disabled)
0
OCD2f
only
13
rw
If the bit is set to one only failure indication is activated at the OCD2 channel.
Over current detection is not activated if the bit is set to one.
Default is 0 (= fault signal on both OCDs)
0
RATIO
Gain
14
rw
If the bit is set, the sensitivity is ratio metric to VDD respective to VREF in single-
ended mode. Default is 0 (=disabled)
0
RATIO
Off
15
rw
The ratio-metric offset behavior of the quiescent voltage is activated if the bit is
set to one. Default is 0 (=disabled)
0
4.2 Programming Example
Table 12 will guide the user through a complete programming sequence.
After activating the interface the integrated intelligent state machine (ISM) has to be powered down. To avoid
unintended high current consumption during applying the programming voltage at the OCD2 pin, the error
indication has to be disabled by writing the disable failure indication command to the device.
Programming requires two single commands followed by the programming pulse. One sequence is required to
program the ones and one sequence to program the zeros into the EEPROM. All digital values are stored in the
EEPROM. Figure 12 gives timing and an exemplary description of the programming sequence.