Figure 5 Enabling SICI interface after device start up
2.3 Communication timing
As communication runs in both direction the GPIO of the external controller shall support tri state. After releasing
the A
OUT
back to V
Sens
, the 16-bit enter-interface-command with LSB first has to be send from the controller. Figure
5 shows the LSB and MSB of the enter-interface-command.
In the Figure 5, the green highlighted squares indicate the received bit while the blue highlighted squares indicate
the bits sent by the sensor.
2.3.1 Single low/high PWM transmission
The initial pulse length t
1
& t
2
in Figure 6 and Figure 7 determines the write sequence.
Figure 6 SICI duty cycle; sending logic '0' to the device; receiving logic '1' from the device
The read-out time t
4
is marked with a grey square. The timing of the read sequence t
4
is depending on the low
time t
1
and high time t
2
as described in Table 1.