Integra DTR-7.6 - Page 6

DTR-7.6
A
1
2
3
4
5
BCD
BLOCK DIAGRAM
AMPLIFIER
SECTION
Z2RL
SBRL CSRL FRL
Z2R_PO
Z2SW_PO
Z2L_PO
SBMUT
AMUT
HPMUT
Z2LMUT
RS232C
INTERFACE
RS232C
FRONT LEFT
FRONT RIGHT
CENTER
SURR. LEFT
SURR. RIGHT
ZONE2 LEFT
ZONE2 RIGHT
SUUR. BACK
LEFT
SUUR. BACK
RIGHT
+20.2dB
+6dB@ZONE2
TONE
TONE
FL
FR
SW
C
SBL
SBR
SL
SR
PREOUT
R
L
SW
ZONE2 PREOUT/LINEOUT
HEADPHONES
SPEAKER TERMINALS
POWER AMPLIFIER
+29dB
+29dB
+29dB
+29dB
+29dB
+29dB
+29dB
TONE
TONE
BD3814
12V TRIGGER A
12V TRIGGER B
12V TRIGGER C
12V TRIGGER
CONTROL
IR OUT
IR REMOTE
SENSOR
IR IN B
IR IN A
RIex
RI
INTERFACE
+6dB +6dB
VLSC
LPF LPF
VLSC
+6dB
VLSC
+6dB
VLSC
+6dB
8ch DAC
LPF LPF
8
/CS42528
8
1
2
3
4
5
7
6
28
27
19
17
35
34 28 29 26 27 21 20 22 23
A
A
A
A
From/to
MICROPROCESSOR
6
1
Q3009
SPRLF
SPRLSB
Q3007