Electrical Specifications
18 Datasheet
2.7 Signal Groups
Signals are grouped by buffer type and similar characteristics as listed in Table 2-3. The
buffer type indicates which signaling technology and specifications apply to the signals.
All the differential signals, and selected DDR3 and Control Sideband signals have On-
Die Termination (ODT) resistors. There are some signals that do not have ODT and
need to be terminated on the board. The signals that have ODT are listed in Table 2-4.
Table 2-3. Signal Groups (Sheet 1 of 2)
Signal Group Type Signals
1,2
System Reference Clock
Differential Clock Input BCLK_DP, BCLK_DN
Intel
®
QPI Signal Groups
Differential Intel QPI Input QPI_DRX_D[N/P][19:0], QPI_CLKRX_DP,
QPI_CLKRX_DN
Differential Intel QPI Output QPI_DTX_D[N/P][19:0], QPI_CLKTX_DP,
QPI_CLKTX_DN
DDR3 Reference Clocks
Differential
DDR3 Output DDR{0/1/2}_CLK[D/P][3:0]
DDR3 Command Signals
Single ended CMOS Output DDR{0/1/2}_RAS#, DDR{0/1/2}_CAS#,
DDR{0/1/2}_WE#, DDR{0/1/2}_MA[15:0],
DDR{0/1/2}_BA[2:0]
Single ended Asynchronous Output DDR{0/1/2}_RESET#
DDR3 Control Signals
Single ended CMOS Output DDR{0/1/2}_CS#[5:4], DDR{0/1/2}_CS#[1:0],
DDR{0/1/2}_ODT[3:0], DDR{0/1/2}_CKE[3:0]
DDR3 Data Signals
Single ended CMOS Bi-directional DDR{0/1/2}_DQ[63:0]
Differential CMOS Bi-directional DDR{0/1/2}_DQS_[N/P][7:0]
TAP
Single ended TAP Input TCK, TDI, TMS, TRST#
Single ended GTL Output TDO
Control Sideband
Single ended Asynchronous GTL Output PRDY#
Single ended Asynchronous GTL Input PREQ#
Single ended GTL Bi-directional CAT_ERR#, BPM#[7:0]
Single Ended Asynchronous Bi-directional PECI
Single Ended Analog Input COMP0, QPI_CMP[0], DDR_COMP[2:0]
Single ended Asynchronous GTL Bi-
directional
PROCHOT#
Single ended Asynchronous GTL Output THERMTRIP#
Single ended CMOS Input/Output VID[7:6]
VID[5:3]/CSC[2:0]
VID[2:0]/MSID[2:0]
VTT_VID[4:2]
To Next Page
Loading...
Need help?
General
