Datasheet 17
Electrical Specifications
2.6 Reserved or Unused Signals
All Reserved (RSVD) signals must remain unconnected. Connection of these signals to
V
CC
, V
TTA
, V
TTD
, V
DDQ
, V
CCPLL
, V
SS
, or to any other signal (including each other) can
result in component malfunction or incompatibility with future processors. See
Chapter 4 for a land listing of the processor and the location of all Reserved signals.
For reliable operation, always connect unused inputs or bi-directional signals to an
appropriate signal level, except for unused integrated memory controller inputs,
outputs, and bi-directional pins which may be left floating. Unused active high inputs
should be connected through a resistor to ground (V
SS
). Unused outputs maybe left
unconnected; however, this may interfere with some Test Access Port (TAP) functions,
complicate debug probing, and prevent boundary scan testing. A resistor must be used
when tying bi-directional signals to power or ground. When tying any signal to power or
ground, a resistor will also allow for system testability.
0 1 0 0 1 1 1 1 1.11875 1 0 1 0 1 0 1 0 0.55000
0 1 0 1 0 0 0 0 1.11250 1 0 1 0 1 0 1 1 0.54375
0 1 0 1 0 0 0 1 1.10625 1 0 1 0 1 1 0 0 0.53750
0 1 0 1 0 0 1 0 1.10000 1 0 1 0 1 1 0 1 0.53125
0 1 0 1 0 0 1 1 1.09375 1 0 1 0 1 1 1 0 0.52500
0 1 0 1 0 1 0 0 1.08750 1 0 1 0 1 1 1 1 0.51875
0 1 0 1 0 1 0 1 1.08125 1 0 1 1 0 0 0 0 0.51250
0 1 0 1 0 1 1 0 1.07500 1 0 1 1 0 0 0 1 0.50625
0 1 0 1 0 1 1 1 1.06875 1 0 1 1 0 0 1 0 0.50000
010110001.06250 11111110 OFF
010110011.05625 11111111 OFF
0 1 0 1 1 0 1 0 1.05000
Table 2-2. Market Segment Selection Truth Table for MS_ID[2:0]
MSID2 MSID1 MSID0 Description
1
1. The MSID[2:0] signals are provided to indicate the Market Segment for the processor and may be used for
future processor compatibility or for keying.
0 0 0 Reserved
0 0 1 Reserved
0 1 0 Reserved
0 1 1 Reserved
1 0 0 Reserved
1 0 1 Reserved
1 1 0 Intel Core™ i7 processor Extreme Edition and Intel Core™ i7
processor
1 1 1 Reserved
Table 2-1. Voltage Identification Definition (Sheet 3 of 3)
VID
7
VID
6
VID
5
VID
4
VID
3
VID
2
VID
1
VID
0
V
CC_MAX
VID
7
VID
6
VID
5
VID
4
VID
3
VID
2
VID
1
VID
0
V
CC_MAX