EasyManua.ls Logo

JVC XV-N5SL - K4 S641632 F-Tc75 (Ic506):Cmos Sdram

JVC XV-N5SL
82 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
XV-N5SL
32
5.5 K4S641632F-TC75 (IC506) :CMOS SDRAM
5.5.1 Pin layout
5.5.2 Block diagram
5.5.3 Pin functions
Symbol Description
CLK System clock
CS
Chip select
CKE Clock enable
A0~A11 address
BS0,1 Bank address strobe
RAS
Row address strobe
CAS
column address strobe
WE
Write enable
LDQM Data input/output mask
DQ0~15 Data input/output
Vcc/Vss Power supply/ground
Vccq/Vssq Data output power/ground
N.C Non connect

Other manuals for JVC XV-N5SL

Related product manuals