XV-N5SL
41
5.11 NDV8601VWA-BE(IC501):AV Decoder
5.11.1 Pin layout
5.11.2 Block diagram
5.11.3 Pin function (1/4)
Pin No. Symbol Description
1 VDDio - Power supply terminal 3.3V
2,3 MD10,11 I/O SDRAM Data bus terminal
4 VDD - Power supply terminal 1.8V
5 MD12 I/O SDRAM Data bus terminal
6 VSSio - Connect to ground
7~9 MD13~15 I/O SDRAM Data bus terminal
10 VDDio - Power supply terminal 3.3V
11 DQM1 O SDRAM Data byte enable
12,13 MA9,8 O SDRAM Address bus terminal
14 VSSio - Connect to ground
15,16 MA7,6 O SDRAM Address bus terminal
17 VSS - Connect to ground
18 MA5 O SDRAM Address bus terminal
19 VDDio - Power supply terminal 3.3V
20,21 MA4,3 O SDRAM Address bus terminal
22 MCLK O SDRAM Clock output
23 VSSio - Connect to ground
24 CKE O SDRAM Clock enable output
25,26 MA2,1 O SDRAM Address bus terminal
27 VDDio - Power supply terminal 3.3V
28 MA0 O SDRAM Address bus terminal
29 MA10 O SDRAM Address bus terminal
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