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Error messages and diagnostics
ServoOne User Manual SERCOS II and III
ID no.: 1108.26B.3-00 Date: 04/2020
Error messages and diagnostics
Bit no. Description
31 – 24 Reserved
23 – 16 Counter for interrupt INT0
15 – 8 Counter for ATs sent
7 – 0 Counter for MDTs received
Table 10.11 Counter for interrupts
y Index 9 "COM_SERIII_INT2_Counter": Counter for interrupts with lower
priority.
Bit no. Description
31 – 24 Counter for interrupt "TINT3"
23 – 16 Counter for interrupt "INT1"
15 – 8 Counter for interrupt "TINTMAX"
7 – 0 Counter for interrupt service channel
Table 10.12 Counter for interrupts
y Index 10 "COM_SERIII_PHASESR": Status register during the
communication phases. The change to higher phases is controlled with
the aid of the register. The register is updated with each bus cycle. The
individual bits have the following signicance:
Bit no. Description
31 – 16 Reserved
15 Phase change bit: Port 2
x 0: No phase change active
x 1: Phase change active
14 – 12 Reserved
11 – 8 Actual communication phase port 2 (0 – 4)
7 Phase change bit port 1
0: No phase change active
1: Phase change active
6 – 4 Reserved
3 – 0 Actual communication phase port 1
Table 10.13 Communication status register
y Index 11 "COM_SERIII_DFCSR": Control and status register data ow.
Indicates the actual topology of the slave. The register is updated with each
bus cycle. The individual bits have the following signicance:
Bit no. Description
31 – 2
Reserved
1 – 0 Current topology:
x 00: Loopback port 1 and forward to port 2
x 01: Loopback port 2 and forward to port 1
x 10: Forward port 1 – port 2 and port 2 – port 1 (real-time mode)
x 11: Forward port 1 – port 2 and port 2 – port 1 (not real-time mode)
Table 10.14 Topology
y Index 12 "COM_SERIII_NewPhasePrepare": Diagnostics while changing
phases.
Bit no. Description
31 – 16 Communication phase
15 – 0 Counter, how many cycles have been placed in the "Prepare new phase" status
Table 10.15 Phase change
y Index 13 "COM_SERIII_NewPhaseStart": Diagnostics while changing
phases.
Bit no. Description
31 – 16 Communication phase
15 – 0 Counter, how many cycles have been placed in the "Prepare new phase" status
Table 10.16 Phase change
y Index 14 "COM_SERIII_NewPhaseFinish": Diagnostics while changing
phases.
Bit no. Description
31 – 16 Communication phase
15 – 0 Counter, how many cycles have been placed in the "Finish new phase" status
Table 10.17 Phase change
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