LG SN4A - Block Diagrams; System Block Diagram

3-3
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Only for training and service purposes.
D+/D-
M_BCK/LRCK
/
DATA0,1,2
MTK_RST/ MICOM_TX/RX/ PWR_STATUS /INST_BOOT
PWR-SENS
P_SENSE
OPT_SPDIF
S-Flash
(1MB)
SF_CS/CLK/DI/DO
OPT_DET
TMDS/HPD/EDID_I2C/ARC/CEC
TMDS1/RX_HPD1/EDID_I2C/PWR5V_1
AMP_SD_OTW/DC_DETECT/AMP_PROTECT AMP_PDN
PWM RST PWM SDA/SCL
P_CTRL/D33_CTRL/ DCDC_12_15_CTRL
HPD_DET/ HDMI_I2C
24.576MHz
FR_P/N, TWR_P/N
AUDIO ANALOG AUDIO PWM AUDIO SPDIF
DC_DC, LDO
,Switch -IC
FL_P/N, TWL_P/N
DDR3
128MB
A RA [0~14]
27MHz
Serial Flash
16MB
MCLK/LRCK/ BCK/ADC_DAT
WL_MUTE/INIT/RST /MSG_RDY/CLK/DAT
PWM_BCK /LRCK/DATA2
Wireless
Woofer
Wireless
Module
RX
LCD_DO/CLK/ BL_CTRL
S-Flash
1MB
POWER/FUNC /VOL+/-
SPI
MTK
MT8502
FL
LPF
L
AMP IC
TAS5612L
A
FR
LPF
L
AMP IC
TAS5612L
A
MICOM
MSP430F5438AIPZR
100pin
2
PWM
PS9860
Wireless
Module TX (5G)
HDMI OUT
HDMI IN
OPTICAL
USB
D+/D-
D DQ [0~31]
BT_RESET
FM
TUNER
(FM/)
M_MCLK/LRCK/ BCK/POR_DAT
Key
PCB
LCD
BT_WAKEUP
CSR8510
ADC
PCM1808
(Slave)
M_MCLK/LRCK/ BCK/TUN_DAT
45W
45W
REMOCON
CS#: NF_D7 SO : NF_D5 WP# : NF_D0 HOLD# : NF_D6 SCLK : NF_RBN SI : NF_D2
BLOCK DIAGRAMS
1. SYSTEM BLOCK DIAGRAM