39
7. IC DATA
QU01 : TMP93PW44ADF
Port Setting pin port name I/O use Name
Opt. Act. P-Off Stop
Note
1 P55/AN5 I AN VOL_V1 - - OP
Vol Driver output 1
2 P56/AN6 I AN MODE_SW0 - - OP
MODE SWITCH 0
3 P57/AN7 I - - - - OP
-
4 MNI I - -
To Vs s
5 P60/TXD0 I/O O DO_ Audio - L OP
Audio DO0
6 P61/RXD0 I/O O CE_ Audio H L OP
Audio CE0
7 P62/SCLK0 I/O O CLK_ Audio - L OP
Audio CLK0
8 P63/TXD1 I/O O DO_ Volume L L OP
Volu me DO 1
9 P64/RXD1 I/O O CE_ Volume H L OP
Volu me CE 1
10 P65/SCLK1 I/O O CLK_ Volume H L OP
Volu me CL K1
11 P70/WAIT I/O O LED0 L H OP
PHONO LED
12 P71 I/O O LED1 L H OP
CD LED
13 Vss I Vss -
14 P72 I/O O LED2 L H OP
TAPE LED
15 P73 I/O O LED3 L H OP
CDR/MD LED
16 P74 I/O O LED4 L H OP
TV LED
17 P75 I/O O LED5 L H OP
LD LED
18 P76 I/O O LED6 L H OP
DVD LED
19 P77 I/O O LED7 L H OP
VCR1 LED
20 CLK O - n.c.
Pull up
21 AM8/16 I - n.c.
Pull up
22 X1 I X1 20MHz
23 X2 O X2 20MHz
24 EA I - n.c.
Pull up
25 RESET I RESET
26 P66/XT1 I/O O MOTOR_UP L H OP
Motor Driver UP
27 P67/XT2 I/O O MOTOR_DOWN L H OP
Motor Driver DOWN
28 TEST1 I - -
To TEST2
29 TEST2 I - -
To TEST1
30 Vcc I Vcc -
31 Vss I Vss -
32 ALE O - n.c.
Pull up
33 P00/AD0 I/O O LED8 H L OP
BS LED
34 P01/AD1 I/O O LED_STANDBY H L OP
STAND BY LED
35 P02/AD2 I/O I DOOR_ SW H - OP
Door SW
36 P03/AD3 I/O O 5V_POWER_ON H L OP
5V POWER output
37 P04/AD4 I/O O FL_POWER_ON H L OP
FL output
38 P05/AD5 I/O O POWER_ON H - OP
Power OFF output
39 P06/AD6 I/O O CLK_EEPROM - - OP
EEPROM CLK
40 P07/AD7 I/O I/O DATA_EEPROM - - OP
EEPROM DATA
Port Setting pin port name I/O use Name
Opt. Act. P-Off Stop
Note
41 P10/AD8 I/O O DO_SURR - L OP
Surr. I/F Data Out
42 P11/AD9 I/O I DI_SURR - - OP
Surr. I/F Data In
43 P12/AD10 I/O O CK_SURR - L OP
Surr. I/F CLK
44 P13/AD11 I/O I ACK_SURR L - OP
Surr. I/F Acknowledge.
45 P14/AD12 I/O O REQ_SURR L L OP
Surr. I/F Request
46 P15/AD13 I/O O RST_SURR L L OP
Surr. I/F Reset
47 P16/AD14 I/O O SOFT_MUTE H L OP
Soft Mute ON
48 P17/AD15 I/O - - - L OP
-
49 P20/A0 I/O O RST_FL L H OP
FL Driver Reset
50 P21/A1 I/O O CE_MUTE - L OP
Mute(4094 Device0) CEM
51 P22/A2 I/O O CE_OSD0 L L OP
CVBS OSD Driver CE
52 P23/A3 I/O O CE_OSD1 L L OP
Y/C OSD Driver CE
53 P24/A4 I/O O CE_FL L L OP
FL Driver CE
54 P25/A5 I/O O DO_DISP - L OP
FL, OSD, Video I/F DO2
55 P26/A6 I/O O CK_DISP - L OP
FL, OSD, Video I/F CLK2
56 P27/A7 I/O O CE_VIDEO L L OP
Video(4094 Device1) CE2
57 Vcc I Vcc -
58 P30/RD O - - - L OP
-
59 P31/WR O - - - L OP
-
60 P32/SCK I/O I HEAD_PHONE_SW H - OP
Head Phone Switch
61 P33/SO I/O I Function_ SW_A - - OP
Function. SW A
62 P34/SI I/O I Function_ SW_B - - OP
Function. SW B
63 P35/INT0 I/O INT POWER_DOWN L - OP
Power Down
64 P40/INT1 I/O I VIDEO_DETECT0 L L OP
CVBS Video Detector
65 P41/TO3 I/O I VIDEO_DETECT1 L L OP
Y/C Video Detector
66 P42/INT4 I/O INT ALL_RC5_IN H L OP
RC-5 Input(Main)
67 P43/INT5 I/O I - - - OP
-
68 P44/TO4 I/O O MAIN_RC5_OUT H L OP
Main RC-5 Output
69 P45/INT6 I/O INT POWER_ DOWN - - OP
Power Down
70 P46/INT7 I/O O KILL_IR H L OP
Kill IR signal
71 P47/TO6 I/O O SPEAKER_OFF H H OP
Speaker Relay OFF
72 VrefH I VrefH -
73 VrefL I VrefL -
74 Avss I Avss -
75 Avcc I Avcc -
76 P50/AN0 I AN POWER_DETECT0 - - OP
Power Detect 0
77 P51/AN1 I AN POWER_DETECT1 - - OP
Power Detect 1
78 P52/AN2 I AN KEY_INPUT0 - - OP
Key Input 0
79 P53/AN3 I AN KEY_INPUT1 - - OP
Key Input 1
80 P54/AN4 I AN VOL_V0 - - OP
Vol. Driver output 0
I
I
Q609 : TMP93PW44ADF
pin port name I/O use Name Port Setting Note
Opt. Act. Init. Stop
1
P55/AN5 I I MODE_SW0 - - Link Host or _Stand
alone
2
P56/AN6 I I HPBUSY H - Dolby HP system busy
3
P57/AN7 I CAL
H - ADC Calibration
4
NMI - - - - to GND
5
P60/TXD0 I/O O DO0 H Data out to DSP1
6
P61/RXD0 I/O I DI0 - Data In from DSP1
7
P62/SCLK0 I/O O SCLK0 H Clock Out to DSP1
8
P63/TXD1 I/O O DO1 H Data out to DIR
9
P64/RXD1 I/O I DI1 - Data In from DIR
10
P65/SCLK1 I/O O SCLK1 H Clock Out to DIR
11
P70/WAIT I/O O HPMODE0 L Dolby HP mode
12
P71 I/O O HPMODE1 L Dolby HP mode
13
Vss I Vss GND - - GND
14
P72 I/O O _HPPD L L Dolby HP system down
15
P73 I/O O HPFS0 L Dolby HP fs
16
P74 I/O O HPFS1 L Dolby HP fs
17
P75 I/O O HPMUTE H L Dolby HP mute
18
P76 I/O O BYPASS H L Bpass DSP 2
19
P77 I DI_DSP2
- - Data from AK7706
20
CLK - n.c. - - pull up
21
AM8/16 - n.c. - - pull up
22
X1 X1 20MHz - -
23
X2 X2 20MHz - -
24
EA - n.c. - - pull up
25
RESET I RESET _RSTC L - Reset from Main CPU
26
P66/XT1 I/O O SMUTE H H Soft mute by DAC
27
P67/XT2 I/O O _ATT L H Attenuate to ADC IN
28
TEST1 - - - - Connect to TEST2
29
TEST2 - - - - Connect to TEST1
30
Vcc I Vcc +5VD - - Vcc
31
Vss I Vss GND - - GND
32
ALE - fixed - - pull up
33
P00/AD0 I/O O ISEL1 - - Digital Input Selector
34
P01/AD1 I/O O ISEL2 - - Digital Input Selector
35
P02/AD2 I/O O ISEL3 - - Digital Input Selector
36
P03/AD3 I/O O CSEL1 - - Digital output Selector
37
P04/AD4 I/O O CSEL2 - - Digital output Selector
38
P05/AD5 I/O O CSEL3 - - Digital output Selector
39
P06/AD6 I/O O KILLC H - Kill Digital output
40
P07/AD7 I/O I _WR_J3 L - J3 Write Flash Mem. *1
I/O
O
I
I
I
O
I
I
O
pin port name I/O use Name Port Setting Note
Opt
.
Act.
Init.
Stop
41
P10/AD8 O CLK_DSP2 H Clock for AK7706
42
P11/AD9 O D_A - H Digital / _Analog select
43
P12/AD10 O DO_DSP2 H Data for AK7706
44
P13/AD11 O _UMUTE L L Hard Mute for Tr
45
P14/AD12 O FS96 H L 96kHz fs
46
P15/AD13 O HPDATA H L select HP data
47
P16/AD14 O _RESETHP L L reset for HP
48
P17/AD15 O _CS_DSP1 L H _CS_DSP1(main DSP)
49
P20/A0 O
_CSB_DSP1
L H _CS DSP1(sub DSP)
50
P21/A1 O _REQ_DSP
2 L H _RQ for AK7706
51
P22/A2 O
_CE_DIR
L G _CE for DIR
52
P23/A3 O _INITRST L L Initial Reset AK7706
53
P24/A4 O _RSTDSP2 L L DSP Reset AK7706
54
P25/A5 O _RSTDA L L Reset DAC
55
P26/A6 O _IC L L Reset DSP1
56
P27/A7 O _XMODE L L _Reset DIR
57
Vcc Vcc +5VD - - Vcc
58
P30/RD O _RSTAD L L Reset & Cal for ADC
59
P31/WR O _IFACK L H Ack to main CPU
60
P32/SCK I IFSCK - - Clock from main CPU
61
P33/SO O IFDO - H Data to main CPU
62
P34/SI I IFDI - - Data from main CPU
63
P35/INT0 INT OVFB H - Over Level (sub DSP1)
64
P40/INT1 INT XSTATE H - MCLK status(L:/unstable)
65
P41/TO3 O
MIXF
- L
SW mix to Front LR
66
P42/INT4 INT
(LO CK)
L - Reserved
67
P43/INT5 INT ERF H -
DIR Error
68
P44/TO4 I CSFLAG H - Ch. Status(fall edge DIR)
69
P45/INT6 INT _IFREQ L - Request from main CPU
70
P46/INT7 INT RDY_DSP2 - - Ready for AK7706
71
P47/TO6 O MIXS - L
SW mix to Surr LR&FrontL/R
72
VrefH VrefH +5VD - - ref High voltage for int. AD
73
VrefL VrefL GND - - ref Low voltage for int. AD
74
Avss Avss GND - - GND for Int. AD
75
Avcc Avcc +5VD - - Vcc for Int. AD
76
P50/AN0 AN KEY_INPUT0 - - Optional key input 0
77
P51/AN1 AN KEY_INPUT1 - - Optional key input 1
78
P52/AN2 AN KEY_INPUT2 - - Optional key input 2
79
P53/AN3 AN KEY_INPUT3 - - Optional key input 3
80
P54/AN4 AN KEY_INPUT4 - - Optional key input 4
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
QU01 : TMP93PW44ADF
Q609 : TMP93PW44ADF
To Next Page
Loading...
