2018 Microchip Technology Inc. DS70005340A-page 13
CAN FD Protocol Module
Register 3-3: C1NBTCFGH: CAN Nominal Bit Time Configuration Register High
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BRP<7:0>
bit 15 bit 8
R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0
TSEG1<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 BRP<7:0>: Baud Rate Prescaler bits
1111 1111 = T
Q
= 256/F
SYS
...
0000 0000 = T
Q
= 1/F
SYS
bit 7-0 TSEG1<7:0>: Time Segment 1 bits (Propagation Segment + Phase Segment 1)
1111 1111 = Length is 256 x T
Q
...
0000 0000 = Length is 1 x T
Q
Note 1: These bits can only be modified in Configuration mode (OPMOD<2:0> =
100
).
Register 3-4: C1NBTCFGL: CAN Nominal Bit Time Configuration Register Low
(1)
U-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1
— TSEG2<6:0>
bit 15 bit 8
U-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1
—SJW<6:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0’
bit 14-8 TSEG2<6:0>: Time Segment 2 bits (Phase Segment 2)
111 1111 = Length is 128 x T
Q
...
000 0000 = Length is 1 x T
Q
bit 7 Unimplemented: Read as ‘0’
bit 6-0 SJW<6:0>: Synchronization Jump Width bits
111 1111 = Length is 128 x T
Q
...
000 0000 = Length is 1 x T
Q
Note 1: These bits can only be modified in Configuration mode (OPMOD<2:0> =
100
).