Microchip Technology dsPIC33 series - Register 3-5: C1 DBTCFGH: CAN Data Bit Time Configuration Register High; Register 3-6: C1 DBTCFGL: CAN Data Bit Time Configuration Register Low

dsPIC33/PIC24 Family Reference Manual
DS70005340A-page 14  2018 Microchip Technology Inc.
Register 3-5: C1DBTCFGH: CAN Data Bit Time Configuration Register High
(1)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
BRP<7:0>
bit 15 bit 8
U-0 U-0 U-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-0
— — — TSEG1<4:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 BRP<7:0>: Baud Rate Prescaler bits
1111 1111 = T
Q = 256/F SYS
...
0000 0000 = T
Q = 1/F SYS
bit 7-5 Unimplemented: Read as ‘0’
bit 4-0 TSEG1<4:0>: Time Segment 1 bits (Propagation Segment + Phase Segment 1)
1 1111 = Length is 32 x T
Q
...
0 0000 = Length is 1 x T
Q
Note 1: This register can only be modified in Configuration mode (OPMOD<2:0> = 100).
Register 3-6: C1DBTCFGL: CAN Data Bit Time Configuration Register Low
(1)
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-1 R/W-1
— — — — TSEG2<3:0>
bit 15 bit 8
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-1 R/W-1
— — — —SJW<3:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-12 Unimplemented: Read as ‘0’
bit 11-8 TSEG2<3:0>: Time Segment 2 bits (Phase Segment 2)
1111 = Length is 16 x T
Q
...
0000 = Length is 1 x T
Q
bit 7-4 Unimplemented: Read as ‘0’
bit 3-0 SJW<3:0>: Synchronization Jump Width bits
1111 = Length is 16 x T
Q
...
0000 = Length is 1 x T
Q
Note 1: This register can only be modified in Configuration mode (OPMOD<2:0> = 100).